Deserializer, semiconductor device, electronic device, and data transmission system

• US 6,628,214 B1
• Filed: 05/01/2000
• Issued: 09/30/2003
• Est. Priority Date: 09/01/1998
• Status: Expired due to Term

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Kitamura, Shojiro, Kawase, Takeo
• Primary Examiner(s): Young, Brian
• Assistant Examiner(s): Nguyen, John B
• Application Number:
  US09/530,450
• Time in Patent Office: 1,247 Days
• Field of Search: 341/100, 341/101, 370/112, 370/110.1
• US Class Current: 341/100
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: H03M 9/00 Parallel/series conversion or vice versa digital stores in which the information is moved stepwise per se G11C19/00

Abstract

A serial-to-parallel converter (130) samples serial data DA1 comprising a first data string, which includes one or more unit data strings each including a predetermined number of bits (00XXX . . . XXX) and which is input after a synchronization period, in accordance with a clock signal CL1 which has been used to generate the serial data by converting original parallel data into serial form, thereby converting the serial data to parallel data from one unit data string to another. Signal generation means (140) generates a synchronization signal corresponding to a synchronization period in accordance with the serial data DA1 and the clock signal CL1. The serial data includes a second data string (1100 . . . 000) which appears in each synchronization period and which includes one or more unit data strings having a predetermined bit pattern. If the signal generation means (140) detects a unit data string (11000 . . . 000) in the second data string, it generates a synchronization signal. In accordance with the synchronization signal, the serial-to-parallel converter (130) detects the start position of the unit data string in the first data string.

Claims

1. A serial-to-parallel conversion apparatus, comprising:

a data converter that samples serial data comprising a first data string that includes one or more unit data strings, each data string including a predetermined number of bits, the serial data being input after a synchronization period in accordance with a clock signal which has been used to generate the serial data by converting original parallel data into serial form from one unit data string to another; and

a signal generator that generates a synchronization signal corresponding to the synchronization period, on the basis of the serial data, the serial data including a second data string for synchronization detection within the synchronization period, the second data string including one or more unit data strings each having a predetermined bit pattern, the signal generator generating the synchronization signal when detecting the unit data string in the second data string, and the data converter detecting the start position of the unit data string in the first data string based on the synchronization signal.

2. The serial-to-parallel conversion apparatus according to claim 1, the bit pattern of the unit data string in the second data string being a unique pattern different from any bit pattern in the unit data string in the first data string.

3. The serial-to-parallel conversion apparatus according to claim 2, the signal generator including a data string detector to which the clock signal and the serial data are input, that detects the unit data string in the second data string from the serial data thereby outputting the synchronization signal.

4. The serial-to-parallel conversion apparatus according to claim 3, the data string detector including a data storing device that temporarily stores the serial data from one unit data string to another in accordance with the clock signal, and a synchronization signal output device that outputs the synchronization signal when the unit data string stored by the data storage device has the predetermined bit pattern.

5. The serial-to-parallel conversion apparatus according to claim 1, the signal generator including a data string detector to which the clock signal and the serial data are input, that outputs an auxiliary synchronization signal each time the unit data string in the second data string is detected from the serial data, and a synchronization signal output device that outputs the synchronization signal when a plurality of the auxiliary synchronization signals output from the data string detector are detected.

6. The serial-to-parallel conversion apparatus according to claim 5, the data string detector including a data storage device that temporarily stores the serial data from one unit data string to another in accordance with the clock signal, and an auxiliary synchronization signal output device that outputs the auxiliary synchronization signal when the unit data string held by the data storage device has the predetermined bit pattern.

7. The serial-to-parallel conversion apparatus according to claim 5, the signal generator further including a period control signal generator that generating a period control signal whose voltage level is set to a predetermined value over a second period entirely containing a first period, from its beginning to its end, in which a plurality of auxiliary synchronization signals are successively output, and the synchronization output device outputting the auxiliary synchronization signal when the unit data string has the predetermined bit pattern.

8. The serial-to-parallel conversion apparatus according to claim 5, the signal generator further including a period control signal generator that generating a period control signal whose voltage level is set to a predetermined value over a second period entirely containing a first period, from its beginning to its end, in which a plurality of auxiliary synchronization signals are successively output, and the auxiliary synchronization output device outputting the auxiliary synchronization signal when the unit data string has the predetermined bit pattern.

9. The serial-to-parallel conversion apparatus according to claim 7, the detection signal generator including a first setting device that sets the start timing of the second period in accordance with the auxiliary synchronization signal and the clock signal, a second setting device that sets the end timing of the second period in accordance with the auxiliary synchronization signal and the clock signal, and a controller that controls the voltage of the period control signal in accordance with the setting of the first and second setting device.

10. The serial-to-parallel conversion apparatus according to claim 8, the detection signal generator including a first setting device that sets the start timing of the second period in accordance with the auxiliary synchronization signal and the clock signal, a second setting device that sets the end timing of the second period in accordance with the auxiliary synchronization signal and the clock signal, and a controller that controls the voltage of the period control signal in accordance with the setting of the first and second setting device.

11. The semiconductor device, comprising:

the serial-to-parallel conversion apparatus according claim 1, the serial-to-parallel conversion apparatus being disposed on a semiconductor substrate.

12. An electronic device, comprising:

the serial-to-parallel conversion apparatus according to claim 1; and

a display unit that displays an image in accordance with parallel data converted bay the serial-to-parallel conversion apparatus.

13. The serial-to-parallel conversion apparatus according to claim 1, the second data string including one or more unit data strings each comprising a plurality of bits having a predetermined bit pattern.

14. The serial-to-parallel conversion apparatus according to claim 1, the data converter detecting the start position of the unit data string in the first data string based on the synchronization signal without variably delaying the first data string.

15. A data transmission system for transferring data from a transmitting apparatus to a receiving apparatus, the transmitting apparatus comprising:

an information supplying source that outputs a first clock signal and parallel data;

a second clock signal generator that generates a second clock signal by multiplying the first clock signal; and

a parallel-to-serial conversion apparatus that samples the parallel data in synchronization with the second clock signal and serially outputs data strings comprising unit data strings each having a period corresponding to one cycle of the first clock signal such that a second data string including one or more unit data strings each having a particular bit pattern for synchronization detection is serially output during a synchronization period and such that a first data string including one or more unit data strings is serially output during a period following the synchronization period;

the receiving apparatus comprising;

a receiving device that receives the serial data and the second clock signal from the parallel-to-serial conversion apparatus;

a signal generator that detects the second data string in the serial data and generates a synchronization signal corresponding to the synchronization period; and

a serial-to-parallel conversion apparatus that detects the start position of the unit data string contained in the first data string in the serial data based on the synchronization signal and samples the serial data in synchronization with the second clock signal to convert the serial data into parallel data from one unit data string to another.

16. The data transmission system according to claim 15, the transmitting apparatus including an electric-to-optical signal converter that converts the serial data in the form of an electric signal to an optical signal.

17. The data transmission system according to claim 16, the electric-to-optical signal converter including a surface emitting laser.

18. The data transmission system according to claim 16, the electric-to-optical signal converter including a multi-wavelength surface emitting laser.

19. The data transmission system according to claim 16, a transmission medium that transmits the second clock signal and the serial data being formed of a plurality of optical fibers, and the electric-to-optical signal converter being formed of a multi-beam surface emitting laser.

20. The data transmission system according to claim 15, the second data string including one or more unit data strings each comprising a plurality of bits having a particular bit pattern.

21. The data transmission system according to claim 15, the serial-to-parallel conversion apparatus detecting the start position of the unit data string contained in the first data string in the serial data based on the synchronization signal and samples the serial data in synchronization with the second clock signal without variably delaying the serial data to convert the serial data into parallel data from one unit data string to another.