Method of erasing a flash memory

  • US 6,643,184 B2
  • Filed: 01/24/2002
  • Issued: 11/04/2003
  • Est. Priority Date: 02/05/2001
  • Status: Active Grant
First Claim
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1. A method of erasing a flash memory comprising a semiconductor substrate having at least one well therein, at least one matrix of memory cells in a plurality of rows and a plurality of columns in the at least one well, and a plurality of word lines connected to the memory cells such that each memory cell in a row connects to a corresponding word line, the method comprising:

  • applying a single erasing pulse to a selected well and at least one selected word line to thereby erase each memory cell connected thereto and without an intermediate check of completion of erasure;

    the at least one selected word line comprising a selected subset of the plurality of word lines.

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