Solid-state image sensor of a MOS structure

• US 6,649,948 B2
• Filed: 05/06/2002
• Issued: 11/18/2003
• Est. Priority Date: 11/09/1998
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Inoue, Ikuko
• Primary Examiner(s): Munson, Gene M.
• Application Number:
  US10/138,557
• Publication Number:
  US 20020125513A1
• Time in Patent Office: 561 Days
• Field of Search: 257/291, 257/292, 257/369, 257/544, 257/435, 257/464
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14656 Overflow drain structures
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

In a MOS type solid-state image sensor having an image pickup area formed at a semiconductor substrate and comprising a two-dimensional array of row and column unit cells including a photoelectric conversion section and signal scanning circuit, a first p well area is provided in a surface portion of an n type silicon substrate and a second p well area is selectively provided in the surface portion of the first p well area and is higher in p type impurity concentration than the first p well area. In the image pickup area, the photoelectric conversion section is formed in the first p well area and the signal scanning circuit section is formed in the second p well area.

Claims

1. A metal oxide semiconductor (MOS) type solid-state image sensor comprising:

an n type semiconductor substrate;

at least one first p well area provided in a surface portion of the n type semiconductor substrate;

a plurality of second p well areas selectively provided at a surface portion of the first p well area and having a higher p type impurity concentration than the first p well area;

at least one third p well area provided in the surface portion of the n type semiconductor substrate and spaced a predetermined distance from the first p well area;

an image pickup area comprising a two-dimensional array of row and column unit cells having a photoelectric conversion section provided in the first p well area and a signal scanning circuit section in the second p well areas;

a plurality of signal lines respectively reading out signal charges from the unit cells in the image pickup area; and

a peripheral circuit area formed in the third p well area.

2. A MOS type solid-state image sensor according to claim 1, wherein a first n well area is formed in the third p well area.

3. A MOS type solid-state image sensor according to claim 2, wherein the first n well area is equal in depth to, or greater in depth than, the first p well area.

4. A MOS type solid-state image sensor according to claim 2, further comprising a second n well area formed in the surface portion of the n type semiconductor substrate at an area between the first p well area and the third p well area and having a higher n type impurity concentration than the substrate.

5. A MOS type solid-state image sensor according to claim 4, wherein the second n well area is grounded.