Multilayer circuit board

• US 6,653,572 B2
• Filed: 02/07/2001
• Issued: 11/25/2003
• Est. Priority Date: 02/07/2001
• Status: Expired due to Fees

• Current Assignee: Furukawa Electric Company Limited
• Original Assignee: Furukawa Electric Company Limited
• Inventors: Iizuka, Kenji, Ishiwa, Masayuki, Nishimura, Takeshi
• Primary Examiner(s): Talbott, David L.
• Assistant Examiner(s): NORRIS, JEREMY C
• Application Number:
  US09/779,691
• Publication Number:
  US 20020104681A1
• Time in Patent Office: 1,021 Days
• Field of Search: 174/250, 174/258, 174/259, 174/255, 361/719, 361/790, 361/803, 361/712, 361/713, 361/707, 361/708, 361/717, 361/718, 361/720, 361/721, 361/722
• US Class Current: 174/250
• CPC Class Codes: H05K 1/056 the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 1/144 Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 2201/0367 Metallic bump or raised conductor not used as solder bump solder materials or compositions and methods of application thereof H05K3/3457
• CPC Class Codes: H05K 2201/0382 Continuously deformed conductors
• CPC Class Codes: H05K 2201/09054 Raised area or protrusion of metal substrate
• CPC Class Codes: H05K 2201/2036 Permanent spacer or stand-off in a printed circuit or printed circuit assembly pattern for applying drops or paste H05K2203/0545
• CPC Class Codes: H05K 2203/167 Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
• CPC Class Codes: H05K 3/28 Applying non-metallic protective coatings H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673
• CPC Class Codes: H05K 3/4641 having integrally laminated metal sheets or special power cores

Abstract

A multilayer circuit board formed by integrally laminating a plurality of printed wiring boards in a multilayer structure so as to provide air gaps therebetween. An insulating layer is formed on each of both surfaces of a metal core substrate having through-hole forming apertures and a printed wiring layer is formed on the each insulating layer. Metal projections integrally formed on the metal core substrate serve as bonding electrodes between the adjacent wiring boards in the multilayer structure. The width of the air gap provided between the adjacent wiring boards is determined by the height of the metal projections.

Claims

1. A multilayer circuit board having a multilayer structure, comprising:

a plurality of printed wiring hoards including at least a first printed wiring board and a second printed wiring board, wherein each of said first and second printed wiring boards includes a metal core substrate having a first major surface and a second major surface which are opposite and parallel to each other;

an electrically insulating layer at least partially covering each of the major surfaces;

a conductive printed wiring layer formed on the surface of said electrically insulating layer and including a plurality of wiring lines;

a solder resist layer partially covering the surface of said conductive printed wiring layer; and

wherein each metal substrate comprises a plurality of integral metal projections made of the same metal material in a single continuous piece as that of the metal core substrate, said projections being of a predetermined height on at least one of said first major surface or said second major surface so as to provide an air gap between the adjacent printed wiring boards in said multilayer structure,

wherein the metal core substrate of said first printed wiring board and the metal core substrate of said second printed wiring board are made of the same metal material with each other; and

wherein said solder resist layer comprises at least one local opening for exposing metal surface at a region corresponding to at least one of said metal projections.

2. A multilayer circuit board according to claim 1, wherein said metal core substrate comprises at least one aperture preliminarily formed through and between said first and second major surfaces to form a through-hole, and wherein said conductive printed wiring layer includes a through-hole conductive portion on an inner surface of said aperture.

3. A multilayer circuit board according to claim 1, wherein each of said metal projections includes an exposed metal top.

4. A multilayer circuit board according to claim 1, wherein each of said metal projections includes an exposed metal surface layer formed by plating said metal core substrate with a metal.

5. A multilayer circuit board according to claim 1, wherein each of said metal projections has a top covered with an electrically insulating layer on which an exposed metal surface layer is formed by plating a metal.

6. A multilayer circuit board according to claim 5, wherein said exposed metal surface layer constitutes a part of said conductive printed wiring layer.

7. A multilayer circuit board according to claim 1, wherein each of said metal projections includes a protrusion formed from said metal core substrate by press forming.

8. A multilayer circuit board according to claim 1, wherein each of said metal projections includes a protrusion left after an etching treatment of said metal core substrate.

9. A multilayer circuit board according to claim 1, wherein the second major surface of said first printed wiring board and the first major surface of said second printed wiring board face each other through an air gap in said multi layer structure, and wherein each metal substrate includes a combination of a metal projection formed on one of said second major surface of said first printed wiring board and said first major surface of said second printed wiring board and a local exposed metal portion provided on the other of said second major surface of said first printed wiring board and said first major surface of said second printed wiring board at a position in alignment with said metal projection.

10. A multilayer circuit board according to claim 9, wherein said exposed metal portion is formed from a part of a surface of said metal core substrate or of said conductive printed wiring layer.