Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor

  • US 6,674,140 B2
  • Filed: 01/29/2001
  • Issued: 01/06/2004
  • Est. Priority Date: 02/01/2000
  • Status: Expired due to Term
First Claim
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1. A chip having anti-stiction properties, said chip comprising:

  • a substrate having a micromachined structure fabricated on one surface thereof; and

    a layer of a linear organo silicon compound disposed on said micromachined structure, wherein the organic substituents on the silicon atom of said silicon compound are phenyl substituents.

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