Method and system to enhance dynamic range conversion useable with CMOS three-dimensional imaging

• US 6,678,039 B2
• Filed: 05/23/2002
• Issued: 01/13/2004
• Est. Priority Date: 05/23/2001
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Canesta Incorporated (Microsoft Corporation)
• Inventors: Charbon, Edoardo
• Primary Examiner(s): Buczinski, Stephen C.
• Application Number:
  US10/155,467
• Publication Number:
  US 20020176067A1
• Time in Patent Office: 600 Days
• Field of Search: 356/5.01, 356/5.08, 356/14.1, 342/135, 342/139, 342/145
• US Class Current: 356/5.01
• CPC Class Codes: G01S 17/08 for measuring distance only indirect measurement G01S17/46; active triangulation systems G01S17/48
• CPC Class Codes: G01S 17/894 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: G01S 7/4868 Controlling received signal intensity or exposure of sensor
• CPC Class Codes: G01S 7/487 Extracting wanted echo signals , e.g. pulse detection
• CPC Class Codes: H04N 23/76 by influencing the image signals
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS

Abstract

High dynamic range brightness information is acquired by inputting detection current to a high (adjustable) gain resettable integrator whose output V(t) is compared to a Vth threshold by a comparator whose output is counted by a reset counter as V(t)≧Vth. When a desired count is attained, data acquisition ends, the counter is read, and the entire circuit is reset. A TOF data acquisition circuit includes first and second sequences of series-coupled delay units, and a like number of latch units coupled between respective delay units. A phase discriminator compares output from each chain and feedback a signal to one of the chains and to a comparator and can equalize delay through each chain. A control voltage is coupled to the remaining chain to affect through-propagation delay time. The latch units can capture the precise time when V(t)≧Vth. Successive measurement approximation can enhance TOF resolution.

Claims

1. A high dynamic range circuit useable with a range finding system that emits energy and detects energy reflected by a target object to determine time-of-flight to said target object, the circuit comprising:

at least one detector to detect reflected said energy and to output a detection signal proportional at least in part to detected reflected said energy;

for each said detector, a resettable integrator with dynamically variable gain coupled to integrate said detection signal and to output an integration signal;

for each said detector, a comparator coupled to compare said integration signal against a threshold level and to output a comparator pulse when said integration signal exceeds said threshold level, an output of said comparator being fed-back to reset said detector;

for each said detector, a resettable logic counter coupled to count each said comparator pulse; and

means for providing a RESET signal to said resettable integrator and to said resettable logic counter;

wherein when said resettable logic counter attains a given count, a count value within said logic counter is read-out as an output of said circuit proportional to detected reflected said energy, and said RESET signal is provided to reset at least two of (i) said detector, (ii) said comparator, and (iii) said resettable logic counter.

2. The circuit of claim 1, wherein said range finding system is a three-dimensional range finding system, and said detector is a photodiode.

3. The circuit of claim 1, wherein said detector is a photodiode, and said resettable integrator is a capacitor selected from a group consisting of (a) a parasitic shunt capacitance of said photodiode, and (b) a physical capacitor.

4. The circuit of claim 1, wherein said detector is a photodiode coupled to a bias source, and an output of said comparator is fed-back to said bias source to reset said photodiode.

5. The circuit of claim 1, wherein said resettable logic counter is implemented using a circuit selected from a group consisting of (a) a series-coupled group of latch circuits, (b) an asynchronous ripple counter, (c) a synchronous counter, and (d) a pseudo-random generator counter.

6. The circuit of claim 1, wherein:

said detector is a photodiode in an array of photodiodes;

one said circuit is provided for each said photodiode; and

said array and each said circuit are fabricated on a single integrated circuit.

7. The circuit of claim 1, wherein:

said detector is a photodiode in an array of photodiodes;

one said circuit is multiplexed-coupled to at least two of said photodiodes; and

said array and each said circuit are fabricated on a single integrated circuit.

8. The circuit of claim 1, wherein for each said detector there is a dedicated resettable integrator.

9. The circuit of claim 1, wherein for each said detector there is a dedicated comparator.

10. The circuit of claim 1, wherein for each said detector there is a dedicated resettable logic counter.

11. The circuit of claim 1, wherein there are more detectors that at least one of a number of resettable intergrators, comparators, and resettable logic counters.

12. The circuit of claim 1, wherein there are fewer detectors than at least one of a number of resettable integrators, comparators, and resettable logic counters.

13. A method to enhance dynamic range of brightness data acquired by a range finding system that emits energy and includes at least one detector to detect target object reflected said energy and to output a detection signal used in determining time-of-flight to said target object, the method including the following steps:

(a) for each said detector, integrating said detection signal and outputting an integration signal using a resettable integrator having dynamically variable gain;

(b) for each said detector, comparing said integration signal against a threshold level using a comparator and outputting a comparator pulse when said integration signal exceeds said threshold level, an output of said comparator being fed-back to said detector;

(c) each said detector, coupling a resettable logic counter to count each said comparator pulse;

(d) reading-out as a measure of acquired said brightness data a count value from said logic counter when said logic counter attains a given count; and

(e) resetting at least two of (I) said detector, (ii) said integrator, and (iii) said logic counter.

14. The method of claim 13, wherein step (a) includes providing a capacitor for use as said resettable integrator.

15. The method of claim 13, wherein:

said detector is a photodiode coupled to a bias device;

further including;

feeding back an output of said comparator to said bias device.

16. The method of claim 13, wherein:

said range finding system is a three-dimensional time-of-flight range finding system; and

said detector is a photodiode.

17. A circuit to resolve time-of flight (TOF) useable with a three-dimensional range finding system that emits energy and detects a portion of said energy reflected by a target object to determine TOF to said target object, the circuit comprising:

first means for propagating a copy of emitted said energy;

second means for propagating a copy of detected reflected said energy; and

means for determining when the propagated copy of emitted said energy coincides in time with the propagated copy of detected reflected said energy;

wherein said means for determining defines a time interval at which time coincidence is determined for use in resolving said TOF.

18. The circuit of claim 17, wherein at least one of said first means for propagating and said second means for propagating includes a number N of series-coupled delay elements, each of said delay elements contributing a known time delay.

19. The circuit of claim 17, wherein at least one of said first means for propagating and said second means for propagating includes a number N of series-coupled delay elements, each of said delay elements contributing a common time delay.

20. The circuit of claim 17, further including:

means for calibrating said circuit such that propagation time through said first means for propagating is made substantially but not precisely equal to propagation time through said second means for propagating.

21. The circuit of claim 17, wherein:

said first means for propagating includes a number N of series-coupled delay elements, where N is an integer greater than one;

said second means for propagating includes N of series-coupled delay elements;

said means for determining includes N latch units;

each of said N latch units having a clock input coupled to an output of an associated one of said N series-coupled delay elements in said first means for propagating, each of said N latch units further having a data input coupled to an input of an associated one of said N series-coupled delay elements in said second means for propagating;

wherein said time coincidence is determined by identifying a state change for each of said N latch units.

22. The circuit of claim 21, further including:

a phase discriminator having a first input coupled to receive from the Nth series-coupled delay element an output signal propagated through said first means for propagation, and having a second input coupled to receive from the Nth one of said N series-coupled delay elements an output signal propagated through said second means for propagation, said phase discriminator having an output coupled to vary time delay through said N series-coupled delay elements in said first means for propagation;

wherein in a calibration mode, propagation time through said first means for propagating is made substantially but not precisely equal to propagation time through said second means for propagating.

23. The circuit of claim 21, further including:

means for varying time delay through each of said N series-coupled delay elements.

24. A circuit to resolve time-of flight (TOF) useable with a three-dimensional range finding system that emits energy and detects energy reflected by a target object to determine TOF to said target object, the circuit comprising:

a first series-coupled group of N delay elements coupled to receive a copy of emitted said energy for propagation through said first series-coupled group, where N is an integer greater than one;

a second series-coupled group of N delay elements coupled to receive a copy of detected reflected said energy for propagation through said second series-coupled group;

a series-coupled group of N latch elements, each of said latch elements having a first input coupled to an input of an associated one of said first series-coupled group of N delay elements, and having a second input coupled to an output of one of said second series-coupled group of N delay elements; and

a phase discriminator coupled to receive an output from the Nth delay element in said first series-coupled group and from an Nth delay element in said second series-coupled group, said phase discriminator generating an output signal coupled to vary delay through said first series-coupled group of N delay elements;

wherein a time interval defined within said N latch elements at which time coincidence is determined is used to resolve said TOF.

25. The circuit of claim 24, further including means for calibrating said circuit such that propagation time through said first series-coupled group is made substantially but not precisely equal to propagation time through said second series-coupled group.

26. The circuit of claim 24, wherein said circuit is fabricated on a common integrated circuit with at least some of said range finding system.

27. A method to resolve time-of flight (TOF) useable with a three-dimensional range finding system that emits energy and detects energy reflected by a target object determine TOF to the target object, the method including the following steps:

(a) propagating a copy of emitted said energy through a first delay system that permits observing incrementally delayed versions of the propagated said copy;

(b) propagating a copy of detected reflected said energy through a second delay system that permits observing incrementally delayed versions of the propagated said copy; and

(c) comparing signals incrementally delayed through said first delay system with signals incrementally delayed through said second delay system to determine closest time coincidence of propagated compared said signals;

wherein time determination of closest said coincidence is used to resolve said TOF.

28. The method of claim 27, further including applying successive approximation to enhance resolution of said TOF.

29. The method of claim 27, further including, in a calibration mode, inputting an output from said first delay system and inputting an output from said second delay system to a phase discriminator whose phase discrimination output is fed-back to control delay through said first delay system.

30. The method of claim 27, further including, in a calibration mode, forcing substantial but not perfect equalization of total delay through said first delay system with total delay through said second delay system;

wherein TOF resolution is approximated by differential total delay through said first delay system and said second delay system.

31. The method of claim 30, wherein said TOF resolution is achieved in a first region of time;

and further including repeating said calibration mode such that substantial but not perfect equalization of total delay is achieved for a second region of time that is a subset of said first region of time in which a previous said calibration mode was carried out;

wherein successive time approximation enhances resolution of said TOF.

32. A CMOS-implementable integrated circuit (IC) time-of-flight (TOF) measurement system used with a generator that emits energy a portion of which energy is reflected by a target object a distance Z from said IC to be detected by a photodiode detector in an array of photodiode detectors within said TOF measurement system, the IC comprising:

for each of said photodiode detectors, at least one of a first circuit and a second circuit;

said first circuit comprising;

a resettable integrator with dynamically variable gain coupled to integrate a detection signal output by said photodiode detector;

a comparator coupled to receive and to compare an integration signal output by said integrator against a threshold level and to output a comparator pulse when said integration signal exceeds said threshold level, an output of said comparator being fed-back to reset said photodiode detector; and

a resettable logic counter coupled to count each said comparator pulse;

means for providing a RESET signal to said resettable integrator and to said resettabie logic counter;

wherein when said resettable logic counter attains a given count, a count value within said logic counter is read-out as an output of said circuit proportional at least in part to detected reflected said energy, and said RESET signal is provided to reset at least two of (i) said detector, (ii) said comparator, and (iii) said logic counter;

said second circuit comprising;

first means for propagating a copy of emitted said energy;

second means for propagating a copy of detected reflected said energy; and

means for determining when in time the propagated copy of emitted said energy coincides with the propagated copy of detected reflected said energy;

wherein a time interval defined within said means for determining at which time coincidence is determined is used to resolve said TOF.

33. The IC of claim 32, further including:

means for identifying a pattern of energy emitted by said generator; and

means for enabling said photodiode detectors to discern reflected energy emitted by said generator from energy emitted by another generator.

34. The IC of claim 33, wherein:

said generator emits energy in a pattern selected from a group consisting of (a) an amplitude modulation pattern, (b) a frequency modulation pattern, (c) a phase-amplitude modulated pattern, (d) a pulse phase modulation pattern, (e) a phase shift keying pattern, and (f) a pulse position modulation pattern.

35. The IC of claim 34, further including:

means enabling said photodiode detectors to recognized a pattern of energy emitted by said generator, said pattern selected from a group consisting of (a) amplitude demodulation, (b) frequency demodulation, (c) phase-amplitude demodulation, (d) pulse phase demodulation, (e) a phase shift de-keying, and (f) pulse position demodulation.