Temperature compensated reference voltage circuit

• US 6,686,796 B2
• Filed: 01/24/2003
• Issued: 02/03/2004
• Est. Priority Date: 02/16/1999
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Casper, Stephen L.
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): Luu, An T.
• Application Number:
  US10/350,990
• Publication Number:
  US 20030107430A1
• Time in Patent Office: 375 Days
• Field of Search: 327/512, 327/513, 327/378, 327/538-543, 326/33, 326/34, 323/313
• US Class Current: 327/538
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence

Abstract

An integrated circuit voltage regulator compensates for temperature variations by adjusting a gain of an amplifier. In one embodiment, the gain is controlled by a voltage divider circuit comprised of a first resistor having a first temperature coefficient, and a second resistor having a second temperature coefficient which is different from the first coefficient. In one embodiment, the first resistor is a p-channel transistor and the second resistance is fabricated from integrated circuit active area.

Claims

1. An integrated circuit having a temperature compensated voltage, comprising:

an amplifier having a first input coupled to receive an input voltage, a second input, and an output node having a reference voltage, wherein the input voltage decreases as temperature increases and increases as temperature decreases; and

a gain adjust circuit connected to the amplifier for adjusting a gain of the amplifier, the gain adjust circuit including a transistor and a resistor coupled in series;

wherein the resistor has a first terminal and a second terminal;

wherein the transistor includes a gate, a drain and a source, one of the source and the drain of the transistor being connected to the first terminal of the resistor, the other of the source and the drain of the transistor being connected to the output node of the amplifier, the gate being connected to ground;

wherein the first terminal of the resistor is connected to the second input of the amplifier;

wherein the transistor defines a first temperature-dependent resistance, wherein the resistor defines a second temperature-dependent resistance, the first temperature-dependent resistance changes at a greater rate than the second temperature-dependent resistance changes whereby the temperature effect of the input voltage is minimized by the gain adjust circuit when producing the reference voltage; and

at least one output amplifier adapted to receive the reference voltage.

2. The integrated circuit of claim 1, wherein the at least one output amplifier is adapted to produce an internal reference voltage in an integrated circuit.

3. The integrated circuit of claim 2, wherein the internal reference voltage is Vccr.

4. The integrated circuit of claim 2, wherein the internal reference voltage is a DRAM reference voltage.

5. The integrated circuit of claim 1, wherein the nonlinear transistor is a long L transistor.

6. The integrated circuit of claim 1, wherein the nonlinear transistor is a p-channel transistor.

7. The integrated circuit of claim 1, wherein the transistor is a large source-drain current transistor.

8. The integrated circuit of claim 1, wherein the resistor includes an N+ active area.

9. An integrated circuit having a temperature compensated voltage, comprising:

an amplifier having a first input coupled to receive an input voltage, a second input, and an output node having a reference voltage, wherein the input voltage decreases as temperature increases and increases as temperature decreases; and

a gain adjust circuit connected to the amplifier for adjusting a gain of the amplifier, the gain adjust circuit including a transistor and a linear device coupled in series;

wherein the linear device has a first terminal and a second terminal;

wherein the transistor includes a gate, a drain and a source, one of the source and the drain of the transistor being connected to the first terminal of the linear device, the other of the source and the drain of the transistor being connected to the output node of the amplifier, the gate being at a voltage level that leaves the transistor in a non-conducting mode of operation;

wherein the first terminal of the linear is connected to the second input of the amplifier;

wherein the transistor defines a first temperature-dependent resistance, wherein the linear device defines a second temperature-dependent resistance, the first temperature-dependent resistance changes at a greater rate than the second temperature-dependent resistance changes wherein the temperature effect of the input voltage is minimized by the gain adjust circuit when producing the reference voltage; and

at least one output amplifier adapted to receive the reference voltage.

10. The integrated circuit of claim 9, wherein the second terminal of the resistor and the gate are connected to ground.

11. The integrated circuit of claim 9, wherein the at least one output amplifier includes a voltage divider circuit.

12. The integrated circuit of claim 11, wherein the voltage divider circuit is connected to both an input of the amplifier and an output of the amplifier.

13. The integrated circuit of claim 9, wherein the first temperature-dependent resistance changes approximately 10% over a temperature range.

14. The integrated circuit of claim 13, wherein the second temperature-dependent resistance changes at a rate of 5% over a same temperature range.

15. An integrated circuit, comprising:

a memory array;

an access circuit operably connected to the memory array; and

a temperature compensation circuit adapted to produce, from an input voltage, an essentially constant reference voltage having minimized temperature effects, at least one of the memory array and the access circuit being adapted to receive the reference voltage, the temperature compensation circuit including;

an amplifier having a first input coupled to receive an input voltage, a second input, and an output node having an intermediate voltage, wherein the input voltage decreases as temperature increases and increases as temperature decreases; and

a gain adjust circuit connected to the amplifier for adjusting a gain of the amplifier, the gain adjust circuit including a transistor and a resistive path coupled in series;

wherein the resistive path includes a first terminal and a second terminal;

wherein the transistor includes a gate, a drain and a source, one of the source and the drain of the transistor being connected to the first terminal of the resistive path, the other of the source and the drain of the transistor being connected to the output node of the amplifier, the gate being connected to ground;

wherein the first terminal of the resistive path is connected to the second input of the amplifier;

wherein the transistor defines a first temperature-dependent resistance, wherein the resistive path defines a second temperature-dependent resistance, the first temperature-dependent resistance changes at a greater rate than the second temperature-dependent resistance changes, wherein the gain adjust circuit is adapted to minimize a temperature effect of the input voltage to produce the intermediate voltage; and

at least one output amplifier adapted to receive the intermediate voltage.

16. The integrated circuit of claim 15, wherein the first temperature-dependent resistance changes at twice the rate of the second temperature-dependent resistance over a same temperature range.

17. The integrated circuit of claim 15, wherein the first temperature-dependent resistance changes at rate of 10% and the second temperature-dependent resistance changes at a rate of 5% over a same temperature range.

18. The integrated circuit of claim 15, wherein the resistive path includes at least one from a group of an active area resistor, a polysilicon resistor, a transistor, and a diode.

19. The integrated circuit of claim 15, wherein the memory array includes at least one from a group of random access memory, non-volatile memory and static memory.

20. The integrated circuit of claim 19, wherein the access circuit includes at least one from a group of microprocessor, memory controller, and chip set.

21. The integrated circuit of claim 19, wherein the access circuit includes a plurality of address lines, a decoder operably connected to the address lines and the memory array.

22. The integrated circuit of claim 19, wherein the access circuit includes a plurality of data lines and a data buffer operably connected to the plurality of data lines.

23. The integrated circuit of claim 19, wherein the access circuit includes control circuitry adapted to monitor input and output from the memory array.

24. An integrated circuit, comprising:

an amplifier having a first input coupled to receive an input voltage, a second input, and an output node having an intermediate voltage, wherein the input voltage decreases as temperature increases and increases as temperature decreases; and

a gain adjust circuit connected to the amplifier for adjusting a gain of the amplifier, the gain adjust circuit including a transistor and a resistive path coupled in series;

wherein the resistive path includes a first terminal and a second terminal;

wherein the transistor includes a gate, a drain and a source, one of the source and the drain of the transistor being connected to the first terminal of the resistive path, the other of the source and the drain of the transistor being connected to the output node of the amplifier, the gate being connected to ground;

wherein the first terminal of the resistive path is connected to the second input of the amplifier;

wherein the transistor defines a first temperature-dependent resistance, wherein the resistive path defines a second temperature-dependent resistance, the first temperature-dependent resistance changes at a greater rate than the second temperature-dependent resistance changes, wherein the gain adjust circuit is adapted to minimize a temperature effect of the input voltage to produce the intermediate voltage; and

at least one output amplifier adapted to receive the intermediate voltage and adapted to output a reference voltage.

25. An integrated circuit voltage regulator, comprising:

an amplifier having a first input coupled to receive an input voltage, a second input, and an output node having an output voltage, wherein the input voltage decreases as temperature increases and increases as temperature decreases; and

a gain adjust circuit connected to the amplifier for adjusting a gain of the amplifier, the gain adjust circuit including a transistor and a resistive path coupled in series;

wherein the resistive path includes a first terminal and a second terminal;

wherein the transistor includes a gate, a drain and a source, one of the source and the drain of the transistor being connected to the first terminal of the resistive path, the other of the source and the drain of the transistor being connected to the output node of the amplifier circuit, the gate being connected to ground;

wherein the first terminal of the resistive path is connected to the second input of the amplifier; and

wherein the nonlinear device defines a first temperature-dependent resistance, wherein the resistive path defines a second temperature-dependent resistance, the first temperature-dependent resistance changes at a greater rate than the second temperature-dependent resistance changes, wherein the temperature effect of the input voltage is minimized by the gain adjust circuit when producing the output voltage.