Compensating electro-optical device including thin film transistors
First Claim
Patent Images
1. An active matrix device comprising:
- a pixel electrode formed over a substrate having an insulating surface;
a signal line formed over said substrate; and
a switching element operationally connected between said pixel electrode and said signal line, said switching element comprising;
a crystalline semiconductor island formed over said substrate;
a first channel region formed in said semiconductor island;
a second channel region formed in said semiconductor island;
a first impurity doped region in said semiconductor island between said first and second channel regions;
at least two impurity doped regions in said semiconductor island contiguous to said first and second channel regions, respectively, wherein said at least two impurity doped regions have a same conductivity type as said first impurity doped region;
first and second gate electrodes below said first and second channel regions, respectively, with a gate insulating film interposed therebetween wherein said first and second gate electrodes are connected to a same gate line.
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Abstract
A liquid-crystal electro-optical device capable of compensating for the operation of any malfunctioning one of TFTs (thin-film transistors) existing within the device if such a malfunction occurs. Plural complementary TFT configurations are provided per pixel electrode. Each complementary TFT configuration consists of at least one p-channel TFT and at least one n-channel TFT. The input and output terminals of the plural complementary TFT configurations are connected in series. One of the input and output terminals is connected to the pixel electrode, while the other is connected to a first signal line. All the gate electrodes of the p-channel and n-channel TFTs included in said plural complementary TFT configurations are connected to a second signal line.
196 Citations
17 Claims
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1. An active matrix device comprising:
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a pixel electrode formed over a substrate having an insulating surface;
a signal line formed over said substrate; and
a switching element operationally connected between said pixel electrode and said signal line, said switching element comprising;
a crystalline semiconductor island formed over said substrate;
a first channel region formed in said semiconductor island;
a second channel region formed in said semiconductor island;
a first impurity doped region in said semiconductor island between said first and second channel regions;
at least two impurity doped regions in said semiconductor island contiguous to said first and second channel regions, respectively, wherein said at least two impurity doped regions have a same conductivity type as said first impurity doped region;
first and second gate electrodes below said first and second channel regions, respectively, with a gate insulating film interposed therebetween wherein said first and second gate electrodes are connected to a same gate line. - View Dependent Claims (2, 11, 14)
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3. An active matrix device comprising:
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a pixel electrode formed over a substrate having an insulating surface;
a signal line formed over said substrate; and
a switching element operationally connected between said pixel electrode and said signal line, said switching element comprising;
a crystalline semiconductor island formed over said substrate;
a first channel region formed in said semiconductor island;
a second channel region formed in said semiconductor island;
a first impurity doped region in said semiconductor island between said first and second channel regions;
at least two impurity doped regions in said semiconductor island contiguous to said first and second channel regions, respectively, wherein said at least two impurity doped regions have a same conductivity type as said first impurity doped region;
first and second gate electrodes located below said first and second channel regions, respectively, with a gate insulating film interposed therebetween wherein said first and second gate electrodes are connected to a same gate line, wherein said first and second channel regions are doped with boron at a concentration from 1×
1014 to 1×
1017 atoms/cm3.- View Dependent Claims (4, 12, 15)
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5. An active matrix device comprising:
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a pixel electrode formed over a substrate having an insulating surface;
a signal line formed over said substrate; and
a switching element operationally connected between said pixel electrode and said signal line, said switching element comprising;
a crystalline semiconductor island formed over said substrate;
a first channel region formed in said semiconductor island;
a second channel region formed in said semiconductor island;
a first impurity doped region in said semiconductor island between said first and second channel regions;
at least two impurity doped regions in said semiconductor island contiguous to said first and second channel regions, respectively, wherein said at least two impurity doped regions have a same conductivity type as said first impurity doped region;
first and second gate electrodes located below said first and second channel regions, respectively, with a gate insulating film interposed therebetween wherein said first and second gate electrodes are connected to a same gate line; and
an interlayer insulating film formed over said substrate covering said semiconductor island. - View Dependent Claims (6, 7, 8, 13, 16)
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9. An active matrix device comprising:
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a first signal line formed over a substrate;
a second signal line extending orthogonally to said first signal line over said substrate;
a switching element for switching a pixel, said switching element formed at an intersection between said first and second signal lines and comprising;
a crystalline semiconductor island formed over said substrate;
a first channel region formed in said semiconductor island;
a second channel region formed in said semiconductor island;
a first impurity doped region in said semiconductor island between said first and second channel regions;
at least two impurity doped regions in said semiconductor island contiguous to said first and second channel regions, respectively, wherein said at least two impurity doped regions have a same conductivity type as said first impurity doped region;
first and second gate electrodes located below said first and second channel regions, respectively, with a gate insulating film interposed therebetween wherein said first and second gate electrodes are connected to a same gate line. - View Dependent Claims (10, 17)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsHiroki, Masaaki, Mase, Akira
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Primary Examiner(s)Williams, Alexander O.
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Application NumberUS09/102,283Time in Patent Office2,108 DaysField of Search257/59-72, 257/327-368, 257/291, 359/59, 438/157, 438/158US Class Current257/59CPC Class CodesG02F 1/13624 having more than one switch...G02F 1/136245 having complementary transi...
