System for electronic circuit characterization, analysis, modeling and plan development

• US 6,721,922 B1
• Filed: 09/27/2001
• Issued: 04/13/2004
• Est. Priority Date: 09/27/2000
• Status: Expired due to Term

• Current Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Foster, Paul, Walters, Don, Najibi, Tina
• Primary Examiner(s): Siek, Vuthe
• Application Number:
  US09/965,676
• Time in Patent Office: 929 Days
• Field of Search: 716/1-18
• US Class Current: 716/102
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

A system is herein disclosed which allows for the interactive design and analysis of analog and mixed-signal circuits. Circuits may additionally be characterized and verified without leaving the environment provided by the system. The system may be used to analyze multiple circuit designs at the same time. In this manner a designer can create a test that sweeps over several circuit designs. Embodiments of the invention may be integrated with other circuit design tools and development systems.

Claims

1. A system having an integrated environment for the development and analysis of electronic circuits, comprising

a user interface which allows a user to interact with the system;

a plurality of simulation tools;

a circuit design interface for inputting a circuit design;

a model specification tool which allows said user to specify a computational model to be used for analysis of said circuit design; and

,

a plan specification tool which allows said user to specify a plan to be used with said computational model in analyzing, characterizing, or verifying said circuit design; and

,

wherein said plan can be selected by the user from a library of plans, and wherein each of said plans within said library of plans define the steps which must be followed in using said simulation tools to any of analyze, characterize, or verify the circuit design.

2. The system of claim 1 wherein said circuit design interface allows said user to import said circuit design into said integrated environment.

3. The system of claim 2 wherein said circuit design is in the form of a netlist.

4. The system of claim 1 further comprising a circuit design tool wherein said circuit design is input by said user via said design tool.

5. The system of claim 1 wherein the model is a Silicon Calibrated Behavioral Model.

6. The system of claim 1 wherein said model is user-defined.

7. The system of claim 1 further comprising a plan library wherein said plan specification tool allows said user to select said plan from said plan library.

8. The system of claim 1 wherein said plan specification tool allows a user to define said plan.

9. A system for circuit analysis, characterization, and verification, comprising:

a user interface;

a plurality of simulation tools;

a plan creation wizard accessed by said user interface and configured to prompt the user to enter selections that are then used to create or modify a plan; and

,

a set of plans accessed either from within or without the user interface, wherein each of said set of plans defines the steps to be taken for a process including one of analyzing, characterizing, or verifying a particular circuit or device under test.

10. The system of claim 9 wherein the plan is a PERL script.

11. The system of claim 9, wherein said set of plans includes one or more of

a characterization plan, including a script and associated tests that define the steps necessary to create characterization results;

a model generation plan, including a script and associated tests that define the steps necessary to generate a silicon calibrated behavioral model for a target circuit or device under test; and

,

a synthesis plan, including a script, associated tests, and netlist elements that define the steps necessary to create a class of circuit that meets a specified performance criteria.

12. The system of claim 9 wherein the plan may be executed by the user from within the user interface.

13. The system of claim 9 wherein the plan may be executed by the user outside of and independently of the user interface, using a command-line interface.

14. The system of claim 9 including

projects, said projects associated with tools.

15. A system for interactive analysis, characterization, and verification of electronic circuits, for use in electronic circuit design, comprising:

a user interface that allows a user to interact with the system and to create, modify, and execute plans;

a plurality of simulation tools that are used to analyze, simulate, and create electronic circuits or devices;

a library that includes information defining cells and views associated therewith, wherein each cell represents a portion of the circuit or device being analyzed, and wherein each view contains a collection of files that represent a specific representation of said cell, and further wherein said specific representation is understood by one or more of said plurality of simulation tools;

a plan creation wizard accessed by said user interface and configured to prompt the user to enter selections that are then used to create or modify a plan, said prompts including requests for user input or allowing the user to map characterization results to core model parameters; and

,

a set of plans accessed either from within or without the user interface, wherein each of said set of plans defines the steps to be taken for a process including one of analyzing, characterizing, or verifying a particular circuit or device under test.

16. The system of claim 15 wherein the plan is a PERL script.

17. The system of claim 15, wherein said set of plans includes one or more of

a characterization plan, including a script and associated tests that define the steps necessary to create characterization results;

a model generation plan, including a script and associated tests that define the steps necessary to generate a silicon calibrated behavioral model for a target circuit or device under test; and

,

a synthesis plan, including a script, associated tests, and netlist elements that define the steps necessary to create a class of circuit that meets a specified performance criteria.

18. The system of claim 15 wherein the plan may be executed by the user from within the user interface.

19. The system of claim 15 wherein the plan may be executed by the user outside of and independently of the user interface, using a command-line interface.

20. The system of claim 15 including

projects associated with said simulation tools.

21. A system providing a design environment for the analysis, characterization, verification, and model generation of electronic circuits, for use in electronic circuit design, comprising:

an intuitive user interface that allows a user to interact with the system;

a schematic capture environment tightly integrated within the design environment and with said graphical user interface that allows the user to reference and to work with one or a plurality of circuit designs;

a plurality of simulation tools;

a specification sheet tool, operable via said graphical user interface, that manages data from simulations to be performed on a circuit design, and presents the user with a pass/fail status of tests run by said plurality of simulation tools on said circuit design; and

,

a plan building tool for use in developing plans, wherein said plans define the steps which must be followed in using said simulation tools to any of analyze, characterize, or verify the circuit design.

22. The system of claim 21 wherein said plan building tool allows a user to run the simulation tools outside the user interface.

23. The system of claim 21 wherein said plurality of simulation tools includes a documentation tool that allows a user to create design documentation and to keep that documentation with the design setup.

24. The system of claim 21 wherein said plurality of simulation tools includes a set of advanced analysis tools including sweeps, corners, monte carlo and optimization, that work on one or many different circuit designs simultaneously.

25. The system of claim 21 wherein said plurality of simulation tools includes a calibration tool to calibrate a behavioral model to match the results of the original circuit design.

26. The system of claim 21 wherein said plurality of simulation tools includes a behavioral model tool that automatically creates a behavioral model and everything required to calibrate, characterize and verify that model using only high level information from the circuit designer or user.

27. The system of claim 21 wherein the simulation environment can work with multiple circuit and mixed-signal simulators.

28. The system of claim 21 further comprising:

a circuit design interface that allows said user to reference said circuit designs into said integrated environment.

29. The system of claim 28 wherein said circuit designs are in the form of text netlists or schematics.

30. The system of claim 26 wherein the model generation tool allows said user to create a user-defined model.

31. The system of claim 21 further comprising:

a plan library wherein said plan building tool allows said user to select said plan from said plan library.

32. The system of claim 31 wherein said plan building tool allows a user to define said plan.

33. A system for use with a circuit simulation environment that includes a plurality of simulation tools, for use in circuit design analysis, comprising:

a user interface that allows a user to interact with the system and with a spec sheet;

a spec sheet, operable by said user using the user interface, that manages the data from simulations being performed on a particular circuit design, and presents the user with a pass/fail status of tests run on said particular circuit design; and

,

a plan building tool for use in developing plans, wherein said plans define the steps which must be followed in using said simulation tools to any of analyze, characterize, or verify the circuit design.