Diffusion preventing barrier layer in integrated circuit inter-metal layer dielectrics

  • US 6,727,588 B1
  • Filed: 08/19/1999
  • Issued: 04/27/2004
  • Est. Priority Date: 08/19/1999
  • Status: Expired due to Term
First Claim
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1. An integrated circuit, comprising:

  • a substrate having at least one first conductive element disposed thereon;

    an impurity containing dielectric layer of fluorosilicate glass disposed over and contacting said substrate and said first conductive element;

    an impurity preventing barrier layer disposed over and contacting said impurity containing dielectric layer, wherein said impurity preventing barrier layer includes a silicon rich oxide; and

    at least one second conductive element disposed over said impurity preventing barrier layer having at least one surface of said second conductive element contacting said impurity preventing barrier layer.

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