Data storewidth accelerator

  • US 6,748,457 B2
  • Filed: 02/02/2001
  • Issued: 06/08/2004
  • Est. Priority Date: 02/03/2000
  • Status: Active Grant
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First Claim
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1. A data storage controller for controlling storage and retrieval of data to and from a data storage device, the data storage controller comprising:

  • a digital signal processor (DSP) or processor comprising a data compression engine (DCE) for compressing data stored to the data storage device and for decompressing data retrieved from the data storage device;

    a programmable logic device, wherein the programmable logic device is programmed by the DSP or processor to (i) instantiate a first interface for operatively interfacing the data storage controller to the data storage device and to (ii) instantiate a second interface for operatively interfacing the data storage controller to a host system;

    a non-volatile memory device, for storing logic code associated with the DSP or processor, the first interface and the second interface, wherein the data storage controller is embedded within a motherboard of the host system; and

    a cache memory device for temporarily storing data that is processed by or transmitted through the data storage controller;

    wherein the DSP or processor further comprises a bandwidth allocation controller for controlling access to the cache memory device by the DCE, the first interface and the second interface.

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