Trench-gate semiconductor device

• US 6,750,511 B2
• Filed: 09/19/2002
• Issued: 06/15/2004
• Est. Priority Date: 09/19/2001
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kawano, Takahiro, Yoneda, Tatsuo, Matsuki, Hirobumi
• Primary Examiner(s): NGO, NGAN V
• Application Number:
  US10/246,468
• Publication Number:
  US 20030075759A1
• Time in Patent Office: 635 Days
• Field of Search: 257/329, 257/330, 257/331, 257/332, 257/334
• US Class Current: 257/332
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/086 Impurity concentration or distribution
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device comprises a semiconductor layer of a first conductivity type (2), a base region (3) formed proximal to the semiconductor layer, a source region (4) selectively placed over the base region, trenches (T), a gate insulating layer (7) and a gate electrode (6) provided on an inner wall of each of the trenches, and a source electrode (9) connected to the source region. The source region is higher in impurity concentration in a contact (4a) with the source electrode than in a contact with the gate insulating layer, and it is also higher in impurity concentration in the contact (4a) with the source electrode than in a contact with the base region.

Claims

1. A semiconductor device comprising:

a semiconductor layer of a first conductivity type;

a semiconductor region of a second conductivity type formed on the semiconductor layer;

a semiconductor region of a first conductivity type selectively provided on the semiconductor region of the second conductivity type;

a trench extending from the semiconductor region of the first conductivity type through the semiconductor region of the second conductivity type to the semiconductor layer of the first conductivity type;

an insulating layer provided over an inner wall of the trench;

a conductor formed on the insulating layer in the trench; and

an electrode connected to the semiconductor region of the first conductivity type,

the semiconductor region of the first conductivity type having a portion in contact with the electrode, the portion having a higher concentration of impurity of the first conductivity type than a remaining portion of the semiconductor region of the first conductivity type,

wherein the portion having the higher concentration of impurity is provided apart from the semiconductor region of the second conductivity type.

2. A semiconductor device according to claim 1, wherein the portion having the higher concentration of impurity has a concentration of the impurity of the first conductivity type equal to or higher than 3×

10¹⁹ cm<sup>−

3</sup>, and

the remaining portion of the semiconductor region of the first conductivity type has a concentration of the impurity of the first conductivity type equal to or less than 5.5×

10¹⁸ cm<sup>−

3</sup>.

3. A semiconductor device according to claim 1, wherein the electrode also comes in contact with the semiconductor region of the second conductivity type, and

the semiconductor region of the second conductivity type includes a portion in contact with the electrode and higher in concentration of impurity of the second conductivity type than a remaining portion of the semiconductor region of the second conductivity type.

4. A semiconductor device comprising:

a semiconductor layer of a first conductivity type;

a semiconductor region of a second conductivity type formed on the semiconductor layer;

a semiconductor region of a first conductivity type selectively provided on the semiconductor region of the second conductivity type;

a trench extending from the semiconductor region of the first conductivity type through the semiconductor region of the second conductivity type to the semiconductor layer of the first conductivity type;

an insulating layer provided over an inner wall of the trench;

a conductor formed on the insulating layer in the trench; and

an electrode connected to the semiconductor region of the first conductivity type,

the semiconductor region of the first conductivity type having a concentration distribution of the impurity of the first conductivity which is higher at a part in contact with the electrode than at a part in contact with the insulating layer,

wherein the semiconductor region of the first conductivity type has a concentration distribution of the impurity of the first conductivity which is higher at the part in contact with the electrode than at a part in contact with the semiconductor region of the second conductivity type.

5. A semiconductor device according to claim 4, wherein the concentration of the impurity of the first conductivity type at the part in contact with the insulating layer is equal to or less than 5.5×

10¹⁸ cm<sup>−

3</sup>, and

the concentration of the impurity of the first conductivity type at the part in contact with the electrode is equal to or higher than 3×

10¹⁹ cm<sup>−

3</sup>.

6. A semiconductor device according to claim 4, wherein the concentration of the impurity of the first conductivity type at the part in contact with the semiconductor region of the second conductivity type is equal to or less than 5.5×

10¹⁸ cm<sup>−

3</sup>, and

the concentration of the impurity of the first conductivity type at the part in contact with the electrode is equal to or higher than 3×

10¹⁹ cm<sup>−

3</sup>.

7. A semiconductor device according to claim 4, wherein the electrode also comes in contact with the semiconductor region of the second conductivity type, and

the semiconductor region of the second conductivity type includes a portion in contact with the electrode and higher in concentration of impurity of the second conductivity type than a remaining portion of the semiconductor region of the second conductivity type.

11. A semiconductor device according to claim 4, wherein the source electrode also comes in contact with the base region, and

the base region includes a portion in contact with the source electrode and higher in concentration of impurity of the second conductivity type than a remaining portion of the base region.

8. A semiconductor device comprising:

a semiconductor layer of a first conductivity type;

a base region of a second conductivity type formed on the semiconductor layer;

a source region of a first conductivity type selectively provided on the base region;

a trench extending from the source region through the base region to the semiconductor layer;

a gate insulating layer provided over an inner wall of the trench;

a gate electrode embedded in a space defined by the gate insulating layer in the trench; and

a source electrode connected to the source region,

the source region having a concentration distribution of the impurity of the first conductivity which is higher at a part in contact with the source electrode than at a part in contact with the gate insulating layer, and

the source region having a concentration distribution of the impurity of the first conductivity which is higher at the part in contact with the source electrode than at a part in contact with the base region.

9. A semiconductor device according to claim 8, wherein the concentration of the impurity of the first conductivity type of the source region at the part in contact with the gate insulating layer is equal to or less than 5.5×

10¹⁸ cm<sup>−

3</sup>, and

the concentration of the impurity of the first conductivity type of the source region at the part in contact with the source electrode is equal to or higher than 3×

10¹⁸ cm<sup>−

3</sup>.

10. A semiconductor device according to claim 8, wherein the concentration of the impurity of the first conductivity type of the source region at the part in contact with the base region of is equal to or less than 5.5×

10¹⁸ cm<sup>−

3</sup>, and

the concentration of the impurity of the first conductivity type of the source region at the part in contact with the source electrode is equal to or higher than 3×

10¹⁹ cm<sup>−

3</sup>.