Universal two dimensional (frame and line) timing generator
First Claim
Patent Images
1. A timing generator for an imaging system, characterized by:
- a line control unit configured to generate a first timing waveform for line read out of image data from an image sensor;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform for frame read out of image data from an image sensor, the frame control unit including a next frame control word register and a current frame control word register, the next frame control word register to buffer a next frame control word, the current frame control word register to buffer a current frame control word;
a clock generator configured to provide a clock signal to the line control unit;
a request arbitrator configured to arbitrate timing requests between the line control unit and the frame control unit based on an input; and
a control word memory coupled to the request arbitrator and configured to provide a line control word to the line control unit or a frame control word to the frame control unit depending on an output from the request arbitrator, the line control word and the frame control word to control the first timing waveform and the second timing waveform, respectively, wherein the next frame control word register and the current frame control word register provide the input.
3 Assignments
0 Petitions
Accused Products
Abstract
A programmable two-dimensional timing generator according to the invention employs a clock generator (102) and a user-defined two-stage waveform generator (106, 108). A single static random access memory (SRAM) (112) stores a user-defined waveform control word for both waveform generator control units. The SRAM data is entered via the host controller external data bus. A single waveform control word may be used to control both waveform generators.
38 Citations
25 Claims
-
1. A timing generator for an imaging system, characterized by:
-
a line control unit configured to generate a first timing waveform for line read out of image data from an image sensor;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform for frame read out of image data from an image sensor, the frame control unit including a next frame control word register and a current frame control word register, the next frame control word register to buffer a next frame control word, the current frame control word register to buffer a current frame control word;
a clock generator configured to provide a clock signal to the line control unit;
a request arbitrator configured to arbitrate timing requests between the line control unit and the frame control unit based on an input; and
a control word memory coupled to the request arbitrator and configured to provide a line control word to the line control unit or a frame control word to the frame control unit depending on an output from the request arbitrator, the line control word and the frame control word to control the first timing waveform and the second timing waveform, respectively, wherein the next frame control word register and the current frame control word register provide the input. - View Dependent Claims (2, 4, 5, 6, 20, 21)
-
-
3. A timing generator, characterized by:
-
a line control unit configured to generate a first timing waveform;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform;
a clock generator configured to provide a clock signal to the line control unit, the clock generator including first and second reload registers coupled to provide inputs to a multiplexer, the multiplexer pro viding an output to a down counter, the down counter coupled to provide a clock output;
a request arbitrator configured to arbitrate timing requests between the line control unit and the frame control unit; and
a control word memory coupled to the request arbitrator and configured to provide a control word to the line control unit or the frame control unit depending on an output from the request arbitrator.
-
-
7. An imaging sensing system, characterized by:
-
an image sensor for temporarily buffering image data;
a data buffer for temporarily buffering the image data; and
a timing generator, the timing generator including;
a line control unit configured to generate a first timing waveform for line read out of the image data from the image sensor;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform for frame read out of the image data from the image sensor, the frame control unit including a next frame control word register and a current frame control word register, the next frame control word register to buffer a next frame control word, the current frame control word register to buffer a current frame control word;
a clock generator configured to provide a clock signal to the line control unit;
a request arbitrator configured to arbitrate timing requests between the line control unit and the frame control unit based on an input; and
a control word memory coupled to the request arbitrator and configured to provide a line control word to the line control unit or a frame control word to the frame control unit depending on an output from the request arbitrator, the line control word and the frame control word to control the first timing waveform and the second timing waveform, respectively. wherein the next frame control word register and the current frame control word register provide the input. - View Dependent Claims (8, 10, 11, 12, 22, 23)
-
-
9. An imaging sensing system, characterized by:
-
an image sensor for temporarily buffering image data;
a data buffer for temporarily buffering the image data; and
a timing generator, the timing generator including, a line control unit configured to generate a first timing waveform for line read out of the image data from the image sensor;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform for frame read out of the image data from the image sensor;
a clock generator configured to provide a clock signal to the line control unit, the clock generator including first and second reload registers coupled to provide inputs to a multiplexer, the multiplexer providing an output to a down counter, the down counter coupled to provide a clock output, a request arbitrator configured to arbitrate timing requests between the line control unit and the frame control unit; and
a control word memory coupled to the request arbitrator and configured to provide a control word to the line control unit or the frame control unit depending on an output from the request arbitrator.
-
-
13. A timing generator for an imaging system, characterized by:
-
a line control unit configured to generate a first timing waveform for line read out of image data from an image sensor;
a frame control unit coupled to the line control unit and configured to generate a second timing waveform for frame read out of image data from an image sensor, the frame control unit including a next frame control word register and a current frame control word register, the next frame control word register to buffer a next frame control word, the current frame control word register to buffer a current frame control word;
a control word memory configured to provide a line control word to the line control unit or a frame control word to the frame control unit, the line control word and the frame control word to control the first timing waveform and the second timing waveform, respectively; and
an arbitration unit coupled to the line control unit, the frame control unit, and the control word memory, the arbitration unit configured to select which one of the line control unit or the frame control unit is active based on an input, wherein the next frame control word register provide and the current frame control word register the input. - View Dependent Claims (14, 15, 17, 18, 19, 24, 25)
-
-
16. A timing generator, characterized by:
-
a control word memory configured to provide a control word for a line control unit for outputting a first waveform and a frame control unit for outputting a second waveform;
an arbitration unit coupled to the line control unit, the frame control unit, and the control word memory, the arbitration unit configured to select which one of the line control unit or the frame control unit is active; and
a clock generator coupled to the line control unit, the clock generator including first and second reload registers coupled to provide inputs to a multiplexer, the multiplexer providing an output to a down counter, the down counter coupled to provide a clock output.
-
Specification