Apparatus and method for testing socket

• US 6,792,376 B2
• Filed: 01/27/2003
• Issued: 09/14/2004
• Est. Priority Date: 09/17/2002
• Status: Expired due to Fees

• Current Assignee: Semibank Company Limited
• Original Assignee: Semibank Company Limited
• Inventors: Lee, Ill Young, Kang, Tae Won, Byon, Dong Myun, Kim, Sei Woong
• Primary Examiner(s): Barlow, John
• Assistant Examiner(s): Lau, Tung S
• Application Number:
  US10/353,217
• Publication Number:
  US 20040054491A1
• Time in Patent Office: 596 Days
• Field of Search: 702/117, 324/761, 324/727, 324/403, 701/33, 701/35, 701/300, 340/870, 356/326, 356/315, 320/135, 376/247, 73/28, 439/751, 369/29, 123/198
• US Class Current: 702/117
• CPC Class Codes: G01R 31/2808 Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards probe, multiprobe, probe manipulator or probe fixture G01R1/067
• CPC Class Codes: G01R 35/005 Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references G01R33/0035, G01R35/002 take precedence

Abstract

An apparatus and a method for testing a socket are disclosed. The resistance values of the contactor pins of the socket can be precisely measured, and the measurement is made automatic so as to decrease the expense and manpower. The method includes the following steps. That is, a calibration PCB is formed into a closed circuit, and all the resistance values forming a closed circuit loop for respective channels are extracted and stored (first step). A socket-installed PCB is formed into a closed circuit, and all resistance values forming a closed circuit loop for respective channels are extracted and stored (second step). Differences between the resistance values of the respective channels of the calibration PCB and the resistance values of the respective channels of the socket-installed PCB are calculated (third step). The differences thus calculated are displayed to a screen for the respective channels (fourth step).

Claims

1. The socket testing apparatus comprising:

a contact unit for obtaining resistance values of respective channels of a calibration PCB and resistance values of respective channels of a socket-installed PCB;

a multiplexer for channeling the respective resistance values from the contact unit so as to output the resistance values of the respective channels in a sequential manner;

a resistance measurement part for storing the respective output resistance values of the multiplexer into a memory, and for calculating differences between the mentioned resistance values and the resistance values of the respective channels of a socket-installed PCB;

a controller for controlling operations of respective elements, and for outputting the output calculation value of the resistance measurement part to a display part; and

the display part displaying an output of the controller wherein the contact unit comprises;

a measurement table with the calibration PCB or the socket-installed PCB mounted thereupon;

a contact structure installed thereupon, for contacting to the calibration PCB or to the socket-installed PCB so as to form a closed circuit loop; and

a first moving means for moving the contact structure up and down, so as to make it contacted to pads of the calibration PCB or to contactors of the socket.

2. The socket testing apparatus as claimed in claim 1, further comprising:

a second moving means for moving the first moving means horizontally.

3. The socket testing apparatus as claimed in claim 1, wherein the contact structure is made of a high conductivity material, and in its bottom interior, there is disposed a pusher having an elastic property for damping an impact when contacting to the socket.

4. The socket testing apparatus as claimed in claim 1, wherein in the calibration PCB, a plurality of pads for respective channels are merged into a single pad.

5. The socket testing apparatus as claimed in claim 1, wherein the resistance values of the calibration PCB are all the resistance values that form a closed circuit loop, with the resistance values of the socket-installed PCB being excluded.

6. The socket testing apparatus as claimed in claim 1, wherein the resistance values of the socket-installed PCB are all the resistance values that form a closed circuit loop, with the resistance values of the calibration PCB being excluded.

7. A socket testing method comprising the steps of:

forming a calibration PCB into a closed circuit, and extracting and storing all resistance values forming a closed circuit loop for respective channels (first step);

forming a socket-installed PCB into a closed circuit, and extracting and storing all resistance values forming a closed circuit loop for respective channels (second step);

calculating differences between the resistance values of the respective channels of the calibration PCB and the resistance values of the respective channels of the socket-installed PCB (third step); and

displaying the differences thus calculated to a screen for the respective channels (fourth step), wherein the screen of the fourth step displays;

frequencies of occurrences of channels within a particular resistance value range when the calibration PCB is measured, frequencies of occurrences of channels within a particular resistance value range when the socket-installed PCB is measured, and frequencies of occurrences of differences between the channels of the two PCBs, in a sequential manner at a left portion of the screen; and

differences of resistance values of the respective channels between the calibration PCB and the socket-installed PCB at a right portion of the screen.

8. A socket testing method comprising the steps of:

forming a calibration PCB into a closed circuit, and extracting and storing all resistance values forming a closed circuit loop for respective channels (first step);

forming a socket-installed PCB into a closed circuit, and extracting and storing all resistance values forming a closed circuit loop for respective channels (second step);

calculating differences between the resistance values of the respective channels of the calibration PCB and the resistance values of the respective channels of the socket-installed PCB (third step); and

displaying the differences thus calculated to a screen for the respective channels (fourth step) wherein the screen of the fourth step displays;

frequencies of occurrence differences between the channels of the calibration PCB and the socket-installed PCB within a particular resistance value range at a left upper portion of the screen;

a statistical window for measured data at a left lower portion of the screen;

numerical resistance values of the respective channels at a right upper portion of the screen; and

magnitudes of resistance values of the respective channels graphically and visually at a right lower portion of the screen.