High speed turbo codes decoder for 3G using pipelined SISO log-map decoders architecture

  • US 6,799,295 B2
  • Filed: 12/30/2002
  • Issued: 09/28/2004
  • Est. Priority Date: 01/02/2001
  • Status: Expired due to Term
First Claim
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1. A baseband processing system for iteratively decoding data received on multiple data paths, the baseband processing system comprising:

  • at least one decoder adapted to receive the data received on one or more of the multiple data paths, wherein each decoder comprises;

    at least two soft decision decoders adapted to receive data associated with corresponding data paths, wherein the at least two soft decision decoders are serially coupled and have at least a first soft decision decoder and a last soft decision decoder, wherein the last soft decision decoder is adapted to output data for the serially coupled series of soft decision decoders;

    at least one memory module that is electrically coupled to an output of a corresponding soft decision decoder, wherein the output of the memory module associated with the last soft decision decoder is fed back as an input to the first soft decision decoder of each of the at least one decoders.

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