Electromagnetic transponder reader

• US 6,847,256 B2
• Filed: 06/04/2003
• Issued: 01/25/2005
• Est. Priority Date: 06/06/2002
• Status: Active Grant

• Current Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Enguent, Jean-Pierre
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): Chang, Joseph
• Application Number:
  US10/454,119
• Publication Number:
  US 20030227323A1
• Time in Patent Office: 601 Days
• Field of Search: 329/358, 340/10, 340/4, 340/10.1, 342/42, 455/337
• US Class Current: 329/358
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: H03D 5/00 Circuits for demodulating amplitude-modulated or angle-modulated oscillations at will H03D9/00, H03D11/00 take precedence

Abstract

A method and a circuit for demodulating a signal transmitted by an electromagnetic transponder, including a sensor of a variable which is a function of the load formed by the transponder on an oscillating circuit, a phase demodulator and an amplitude demodulator at least functionally in parallel and receiving a signal coming from said sensor, a summer of the results provided by the demodulators, and a delay element in series with a first one of said demodulators, to compensate for a possible propagation time difference therebetween.

Claims

1. A circuit for demodulating a signal transmitted by an electromagnetic transponder, comprising:

a sensor of a variable which is a function of the load formed by the transponder on an oscillating circuit;

a phase demodulator and an amplitude demodulator at least functionally in parallel and receiving a signal coming from said sensor;

a summer of the results provided by said demodulators; and

a delay element in series with a first one of said demodulators, to compensate for a possible propagation time difference therebetween.

2. The circuit of claim 1, further comprising a regulator of the delay introduced by said delay element according to the signal provided by said summer.

3. The circuit of claim 1, wherein said first demodulator to which the delay element is associated is the amplitude demodulator.

4. The circuit of claim 1, wherein said regulator comprises:

a rectifying element having its input connected to the summer output;

a comparator having a first input receiving the signal provided by said rectifying element and having a second input receiving a reference signal, the comparator output controlling said delay element.

5. The circuit of claim 1, wherein said delay element is formed of a controllable resistive element in series with said first demodulator, and of a capacitive element connecting a terminal of the resistive element to a reference voltage.

6. The circuit of claim 5, wherein said resistive element is formed of a field-effect transistor, a gate of which receives a regulation signal provided by said regulator and which conditions its series resistance.

7. The circuit of claim 1, wherein said demodulators, summer, delay element, and regulator are made in the form of a digital signal processor.

8. The circuit of claim 1, wherein said sensor measures the current in the oscillating circuit, or the voltage across one or several of its elements.

9. A terminal of generation of an electromagnetic field capable of communicating with at least one transponder when said transponder enters this field, comprising the demodulation circuit of claim 1.

10. A method for demodulating a signal transmitted by an electromagnetic transponder, comprising:

measuring a variable which is a function of the load formed by the transponder on an oscillating circuit;

demodulating in phase the measured signal;

demodulating in amplitude the measured signal;

delaying a first result of at least one of the demodulations with respect to the other;

summing up the results of the two demodulations; and

regulating the delay brought to said first demodulation result according to the result of the sum integration.

11. The method of claim 10, implemented by digital processing means.

12. The method of claim 10, implemented by analog circuits.