Low drop-out voltage regulator and an adaptive frequency compensation
First Claim
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1. A low drop-out voltage regulator having an adaptive frequency compensation means, comprising:
- a regulated DC output terminal;
an unregulated DC input terminal;
an output section having an output capacitor and an output load, wherein said output load is connected from said regulated DC output terminal to the ground reference, wherein said output capacitor is connected in parallel with said output load;
an output pass transistor for supplying power to said output section, wherein said output pass transistor has a source coupled to said unregulated DC input terminal, wherein said output pass transistor has a drain connected to said regulated DC output terminal;
a control circuit for controlling a gate of said output pass transistor; and
a current-controlled resistor for generating a zero-pole, wherein said current-controlled resistor generates an additional equivalent series resistance (ESR).
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Abstract
A method and apparatus to dynamically modify the internal compensation of a low drop-out (LDO) voltage regulator is presented. The process involves creating an additional equivalent series resistance (ESR) from an internal circuit. The additional ESR of the internal circuit is sufficient to ensure the DC output stability. This allows the ESR of the output capacitance to be reduced to zero if desired, for improved transient response.
53 Citations
10 Claims
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1. A low drop-out voltage regulator having an adaptive frequency compensation means, comprising:
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a regulated DC output terminal;
an unregulated DC input terminal;
an output section having an output capacitor and an output load, wherein said output load is connected from said regulated DC output terminal to the ground reference, wherein said output capacitor is connected in parallel with said output load;
an output pass transistor for supplying power to said output section, wherein said output pass transistor has a source coupled to said unregulated DC input terminal, wherein said output pass transistor has a drain connected to said regulated DC output terminal;
a control circuit for controlling a gate of said output pass transistor; and
a current-controlled resistor for generating a zero-pole, wherein said current-controlled resistor generates an additional equivalent series resistance (ESR). - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of circuit operation in a low drop-out voltage regulator comprising:
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accepting a reference voltage at an error amplifier, wherein an output of said error amplifier supplies a common gate signal;
controlling a first transistor by means of said common gate signal to produce an output signal at an output terminal of the voltage regulator from an unregulated input voltage;
controlling a second transistor by means of said common gate signal to supply a high-frequency feedback signal from said unregulated input voltage to an input of said error amplifier;
introducing a zero into the transfer function of the voltage regulator by means of a current-controlled resistor, such that the circuit will be stable when the ESR of an output capacitor of the voltage regulator is lower than 50 mΩ
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supplying said output signal of the power supply to an input of said error amplifier via a large-resistance resistor, wherein the resistance of said large-resistance resistor is at least 10 MΩ
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modulating said common gate signal based on the sum of said high-frequency feedback signal and said output signal supplied to said error amplifier. - View Dependent Claims (10)
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Specification