High voltage resistant edge structure for semiconductor components
First Claim
1. A high voltage semiconductor component, comprising:
- a semiconductor body having a high voltage region and having an edge region of said high voltage region, a high voltage resistant structure at said edge region having at least one inner zone of a first conductivity type adjacent to a first surface of said semiconductor body;
a cell field including a plurality of individual high voltage components in said high voltage region, said high voltage individual components being connected in parallel and arranged in individual cells;
at least one floating guard ring of a second conductivity type arranged in said inner zone, said at least one floating guard ring surrounding said cell field, said at least one floating guard rind extending deep into said inner zone, said at least one floating guard ring extending into said inner zone to a depth greater than said high voltage individual components; and
at least one inter-ring zone of said first conductivity type respectively arranged in said inner zone, said at least one inter-ring zone being arranged adjacent said at least one floating guard ring, said at least one floating guard ring and said at least one inter-ring zone having respective doping levels such that a net doping level over a whole surface area of said edge region is approximately equal to zero, said at least one floating guard ring and said at least one inter-ring zone have conductivities and geometries set such that their free charge carriers are totally depleted when a blocking voltage is applied.
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Abstract
The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.
72 Citations
30 Claims
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1. A high voltage semiconductor component, comprising:
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a semiconductor body having a high voltage region and having an edge region of said high voltage region, a high voltage resistant structure at said edge region having at least one inner zone of a first conductivity type adjacent to a first surface of said semiconductor body;
a cell field including a plurality of individual high voltage components in said high voltage region, said high voltage individual components being connected in parallel and arranged in individual cells;
at least one floating guard ring of a second conductivity type arranged in said inner zone, said at least one floating guard ring surrounding said cell field, said at least one floating guard rind extending deep into said inner zone, said at least one floating guard ring extending into said inner zone to a depth greater than said high voltage individual components; and
at least one inter-ring zone of said first conductivity type respectively arranged in said inner zone, said at least one inter-ring zone being arranged adjacent said at least one floating guard ring, said at least one floating guard ring and said at least one inter-ring zone having respective doping levels such that a net doping level over a whole surface area of said edge region is approximately equal to zero, said at least one floating guard ring and said at least one inter-ring zone have conductivities and geometries set such that their free charge carriers are totally depleted when a blocking voltage is applied. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 15, 16, 17, 18, 19, 20, 25, 26)
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13. A semiconductor chip, comprising:
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a substrate having a major surface;
a field of high voltage semiconductor components defining a high voltage portion in said substrate;
an edge structure at an edge of said high voltage portion, said edge structure separating said high voltage portion of said substrate from an edge of said major surface of said substrate, said edge structure including;
at least one inner zone of a first conductivity type defining a ring structure around said field of high voltage semiconductor components at said major surface;
at least one floating guard ring of a second conductivity type arranged in said at least one inner zone, said at least one floating guard ring extending into said substrate to a depth greater than said high voltage semiconductor components; and
at least one inter-ring zone of said first conductivity type arranged in said at least one inner zone, said at least one inter-ring zone being adjacent to said at least one floating guard ring, at least one of said at least one inter-ring zone and said at least one floating guard ring being of a conductivity and a geometry such that their free charge carriers are totally depleted when a blocking voltage is applied, said at least one inter-ring zone and said at least one floating guard ring having a net doping level over a whole surface area of said major surface of said at least one inner zone. - View Dependent Claims (21, 22, 23, 24, 27, 28)
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14. A semiconductor chip, comprising:
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a substrate having a major surface;
a plurality of high voltage vertical MOSFET components in said substrate;
an edge structure at an edge of said plurality of high voltage vertical MOSFET components to separate said high voltage vertical MOSFET components from a remainder of said substrate, said edge structure including;
at least one inner zone of a first conductivity type defining a ring structure around said plurality of high voltage semiconductor components at said major surface;
at least one floating guard ring of a second conductivity type arranged in said at least one inner zone, said at least one floating guard ring extending deep into said at least one inner zone, said at least one floating guard ring extending deeper into said substrate than said high voltage vertical MOSFET components; and
an inter-ring zone of said first conductivity type arranged in said at least one inner zone, said inter-ring zone being adjacent to said at least one floating guard ring, at least one of said inter-ring zone and said at least one floating guard ring being of a conductivity and a geometry such that their free charge carriers are totally depleted when a blocking voltage is applied, said at least one inter-ring zone and said at least one floating guard ring having respective doping levels such that a net doping level over said at least one inner zone is approximately equal to zero. - View Dependent Claims (29, 30)
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Specification