Method and apparatus for efficient virtual memory management
First Claim
1. A method of managing memory in a computer system, said method comprising:
- a) maintaining at least one hint bit in an address translation table, said hint bit providing information to a first process about the future use of a corresponding memory portion in said memory by a second process associated with said memory portion; and
b) managing said memory portion in response to said information provided by said hint bit.
1 Assignment
0 Petitions
Accused Products
Abstract
A method and an apparatus that improves virtual memory management. The proposed method and apparatus provides an application with an efficient channel for communicating information about future behavior of an application with respect to the use of memory and other resources to the OS, a paging daemon, and other system software. The state of hint bits, which are integrated into page table entries and TLB entries and are used for communicating information to the OS, can be changed explicitly with a special instruction or implicitly as a result of referencing the associated page. The latter is useful for canceling hints. The method and apparatus enables memory allocators, garbage collectors, and compilers (such as those used by the Java platform) to use a page-aligned heap and a page-aligned stack to assist the OS in effective management of memory resources. This mechanism can also be used in other system software.
111 Citations
43 Claims
-
1. A method of managing memory in a computer system, said method comprising:
-
a) maintaining at least one hint bit in an address translation table, said hint bit providing information to a first process about the future use of a corresponding memory portion in said memory by a second process associated with said memory portion; and
b) managing said memory portion in response to said information provided by said hint bit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
-
-
28. In a computer system having a hierarchical memory structure, with said structure having at least a first level of memory (closer to a processor) and a second level of memory (further away from a processor), a method of reducing write backs of data from said first level of memory to said second level of memory, and a method of reducing the number of reads, from said second level of memory to said first level of memory, said method comprising:
-
maintaining at least one hint bit in an address translation table of said memory structure, said hint bit for indicating that data in a corresponding memory portion is useless; and
discarding data in said memory portion in a first level of memory when said hint bit corresponding to said memory portion indicates that said data is useless, whereby said useless data is not written back to said second level of memory, discarding data in said memory portion in a second level of memory when said hint bit corresponding to said memory portion indicates that said data is useless, whereby said useless data is not read into said first level of memory and said data is invalidated in said second level of memory. - View Dependent Claims (29, 30)
-
-
31. Apparatus for managing memory in a computer system, said apparatus comprising:
-
a) an address translation table for maintaining at least one hint bit, said hint bit providing information to a first process about the future use of a corresponding memory portion in said memory by a second process associated with said memory portion; and
b) means for managing said memory portion in response to said information provided by said hint bit. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40)
-
-
41. In a computer system having a hierarchical memory structure, with said structure having at least a first level of memory (closer to a processor) and a second level of memory (further away from a processor), apparatus for reducing write backs of data from said first level of memory to said second level of memory, and for reducing the number of reads, from said second level of memory to said first level of memory, said apparatus comprising:
-
means for maintaining at least one hint bit in an address translation table of said memory structure, said hint bit for indicating that data in a corresponding memory portion is useless; and
means for discarding data in said memory portion in a first level of memory when said hint bit corresponding to said memory portion indicates that said data is useless, whereby said useless data is not written back to said second level of memory.
-
-
42. A program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine to perform method steps for managing memory in a computer system, said method steps comprising:
-
a) maintaining at least one hint bit in an address translation table, said hint bit providing information to a first process to about future use of a corresponding memory portion in said memory by a second process associated with said memory portion; and
b) managing said memory portion in response to said information provided by said hint bit. - View Dependent Claims (43)
-
Specification