Semiconductor device and process for production thereof

• US 6,890,784 B2
• Filed: 06/03/2003
• Issued: 05/10/2005
• Est. Priority Date: 01/21/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Shibata, Hiroshi, Fukunaga, Takeshi, Koyama, Jun, Yamazaki, Shunpei
• Primary Examiner(s): Fourson, George
• Assistant Examiner(s): Pham, Thanh V
• Application Number:
  US10/453,034
• Publication Number:
  US 20040065882A1
• Time in Patent Office: 707 Days
• Field of Search: 438/23, 438/29, 438/30, 438/149, 438/150, 438/152, 438/155, 438/FOR.201, 257/E33.07, 257/E29.151
• US Class Current: 438/30
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136245 having complementary transistors
• CPC Class Codes: G02F 1/136277 formed on a semiconductor substrate, e.g. of silicon
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1237 with a different composition, shape, layout or thickness of the gate insulator in different devices
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in that the storage capacitance is formed between the first electrode formed on the same layer as the light blocking film and the second electrode formed from a semiconductor film of the same composition as the drain region, and the first base insulating film is removed at the part of the storage capacitance so that the second base insulating film is used as the dielectric of the storage capacitance. This structure provides a large storage capacitance in a small area.

Claims

1. A method for producing a semiconductor device including a plurality of pixels, each of the plurality of pixels including a pixel TFT and a storage capacitance,

said method comprising the steps of:

forming a light blocking film over a substrate;

forming an electrode from a same material as the light blocking film over the substrate;

forming a first insulating film covering the light blocking film and the electrode;

etching the first insulating film to form an opening on the electrode;

forming a second insulating film covering the first insulating film and the opening; and

forming a semiconductor film on the second insulating film.

2. A method for producing a semiconductor device including a driving circuit portion and a pixel portion,

said pixel portion having a plurality of pixels, each of the plurality of pixels including a pixel TFT and a storage capacitance,

said method comprising the steps of:

forming a light blocking film over a substrate;

forming an electrode from a same material as the light blocking film over the substrate;

forming a first insulating film that covering the light blocking film and the electrode;

etching the first insulating film to form an opening on the electrode;

forming a second insulating film covering the first insulating film and the opening;

forming a semiconductor film on the second insulating film;

forming a gate insulating film covering the semiconductor film;

etching a portion of the gate insulating film to expose a semiconductor film of the driving circuit portion and a portion of a semiconductor film of the pixel portion;

thermally oxidizing to form a thermal oxide film on a surface of the exposed semiconductor film of the driving portion and the exposed portion of the semiconductor film of the pixel portion.

4. A method according to claim 2,

wherein an interface between the second insulating film and the semiconductor film is formed without exposing to air.

5. A method according to claim 2,

wherein the second insulating film has a thickness smaller than ⅕

of a total thickness of the first insulating film and the second insulating film.

3. A method for producing a semiconductor device including a driving circuit portion and a pixel portion,

said pixel portion having a plurality of pixels, each of the plurality of pixels including a pixel TFT and a storage capacitance,

said method comprising the steps of:

forming a light blocking film over a substrate;

forming an electrode from a same material as the light blocking film over the substrate;

forming a first insulating film covering the light blocking film and the electrode;

etching the first insulating film to form an opening on the electrode;

forming a second insulating film covering the first insulating film and the opening;

forming a semiconductor film on the second insulating film;

forming a gate insulating film covering the semiconductor film;

etching a portion of said gate insulating film to expose a semiconductor film of the driving circuit portion and a portion of a semiconductor film of the pixel portion;

thermally oxidizing to form a thermal oxide film on a surface of the exposed semiconductor film of the driving circuit portion and the exposed portion of the semiconductor of the pixel portion;

forming at least a first LDD region in the semiconductor film of the driving circuit portion and at least a second LDD region in the semiconductor film of the pixel portion,

wherein the first LDD region in the driving circuit portion has a different length from the second LDD region in the pixel portion.

6. A method according to claim 3,

wherein an interface between the second insulating film and the semiconductor film is formed without exposing to air.

7. A method according to claim 3,

wherein the second insulating film has a thickness smaller than ⅕

of a total thickness of the first insulating film and the second insulating film.