Transistor configuration with a structure for making electrical contact with electrodes of a trench transistor cell

  • US 6,891,223 B2
  • Filed: 03/19/2003
  • Issued: 05/10/2005
  • Est. Priority Date: 03/19/2002
  • Status: Active Grant
First Claim
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1. A transistor configuration, comprising:

  • at least one gate terminal;

    at least one source terminal;

    at least one drain terminal;

    a semiconductor substrate having a substrate surface;

    at least one active cell array formed in said semiconductor substrate, said semiconductor substrate having at least one trench formed therein within said active cell array an edge region adjoining said active cell array and said trench extending into said edge region;

    at least one trench transistor cell formed along said trench;

    at least two electrode structures disposed within said trench and extending along said trench; and

    metallizations disposed substantially above said substrate surface of said semiconductor substrate, at least one of said two electrode structures electrically conductively connected to one of said metallizations in said edge region.

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