Carrier with metal bumps for semiconductor die packages

• US 6,893,901 B2
• Filed: 05/14/2001
• Issued: 05/17/2005
• Est. Priority Date: 05/14/2001
• Status: Expired due to Fees

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Madrid, Ruben
• Primary Examiner(s): WOJCIECHOWICZ, EDWARD JOSEPH
• Application Number:
  US09/855,820
• Publication Number:
  US 20020167075A1
• Time in Patent Office: 1,464 Days
• Field of Search: 257/676, 257/668, 257/778, 438/122, 438/666, 438/673
• US Class Current: 438/122
• CPC Class Codes: H01L 21/4846 Leads on or in insulating or insulated substrates, e.g. metallisation H01L21/4821 takes precedence; metallisation of ceramics in general C04B41/51; printed circuits H05K3/00
• CPC Class Codes: H01L 21/4878 Mechanical treatment, e.g. deforming
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73153 Bump and layer connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/492 Bases or plates or solder therefor
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A carrier for a semiconductor die package is disclosed. In one embodiment, the carrier includes a metal layer and a plurality of bumps formed in the metal layer. The bumps can be formed by stamping.

Claims

1. A method for forming a semiconductor die package, the method comprising:

(a) forming carrier, wherein forming the carrier comprises providing a metal layer, and forming a plurality of bumps in the metal layer, wherein the formed bumps are capable of being electrically coupled to conductive regions of a circuit substrate, and wherein forming the plurality off bumps comprises stamping; and

(b) attaching a semiconductor die to the metal layer after forming the plurality of bumps wherein attaching comprises;

attaching the semiconductor die to a die attach region of the carrier, and wherein the plurality of bumps is disposed around the semiconductor die.

10. The method of claim 1 wherein the metal layer comprises copper.

11. The method of claim 1 wherein the bumps in the plurality of bumps are disposed in an array.

12. The method of claim 1 wherein each bump has a conical angle of about 40 degrees of more.

13. The method of claim 1 wherein the metal layer includes one or more sublayers of material on a base metal.

2. A method for forming a carrier for a semiconductor die package, the method comprising:

(a) providing a metal layer; and

(b) forming a plurality of bumps in the metal layer, wherein the formed bumps are capable of being electrically coupled to conductive regions of a circuit substrate, and wherein forming the plurality of bumps comprises stamping, wherein the bumps each have a conical shape.

3. The method of claim 2 wherein the metal layer comprises copper.

4. The method of claim 2 wherein the bumps in the plurality of bumps are disposed in an array.

5. The method of claim 2 wherein the bumps in the plurality of bumps are arranged around the die attach region and have heights greater than the thickness of the semiconductor die.

6. The method of claim 2 wherein the metal layer includes one or more sublayers of material on a base metal.

7. The method of claim 2 wherein each bump has a conical angle of about 40 degrees of more.

8. The method of claim 2 wherein the plurality of bumps are formed simultaneously in the metal layer.

9. The method of claim 2 wherein the metal layer comprises a die attach region and wherein the bumps are formed around the die attach region.