Integrated circuit driver having stable bootstrap power supply

• US 6,897,643 B2
• Filed: 10/11/2002
• Issued: 05/24/2005
• Est. Priority Date: 10/11/2002
• Status: Expired due to Term

• Current Assignee: Monolithic Power Systems Incorporated
• Original Assignee: Monolithic Power Systems Incorporated
• Inventors: Stone, Marshall David
• Primary Examiner(s): Patel, Rajnikant B.
• Application Number:
  US10/269,617
• Publication Number:
  US 20040070383A1
• Time in Patent Office: 956 Days
• Field of Search: 323/288, 323/224, 323/286, 323/282, 323/289, 323/225, 323/284, 323/285, 323/287, 363/60, 363/98, 363/17, 363/56, 363/132, 327/387, 327/390, 327374-377, 327/434, 327/589, 327/537, 327/538, 327/536, 307/910, 307/475, 307/482, 307/578
• US Class Current: 323/288
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit

Abstract

An integrated circuit driver is disclosed. The driver comprises a high side transistor and a low side transistor connected in series. The output of the driver is taken from the source of the high side transistor and the drain of the low side transistor. A bootstrap contact pad is connected to the output node. Connected to the bootstrap contact pad is a bootstrap capacitor that is also connected to a high side gate drive that selectively controls the high side transistor.

Claims

1. An integrated circuit driver comprising:

a high side transistor;

a low side transistor connected in series to said high side transistor such that the source of said high side transistor is connected to the drain of said low side transistor, the source of the high side transistor and the drain of the low side transistor forming an output node;

a bootstrap contact pad connected to the output node;

a bootstrap capacitor having a first terminal connected to said bootstrap contact pad, wherein the bootstrap capacitor couples to the gate and the source of the high side transistor;

a high side gate drive for selectively controlling the high side transistor, said high side gate drive having as an input a signal from a second terminal of said bootstrap capacitor;

a low side gate drive for selectively controlling the low side transistor; and

an output contact pad connected to the output node, said output contact pad providing an output signal to a load.

2. The driver of claim 1 wherein said high side transistor and said low side transistor are NMOS transistors.

3. The driver of claim 1 wherein said output contact pad and said bootstrap contact pad are the same.

4. The driver of claim 1 further including an output package pin connected to said output pad by an output bond wire.

5. The driver of claim 1 further including a bootstrap package pin connection to said bootstrap contact pad by a bootstrap bond wire.

6. The driver of claim 3 further including an output package pin connected to said output pad by an output bond wire.

7. The driver of claim 3 further including a bootstrap package pin connection to said bootstrap contact pad by a bootstrap bond wire.

8. An integrated circuit package comprising:

(a) an integrated circuit die, said die having formed thereon;

(1) a high side transistor;

(2) a low side transistor connected in series to said high side transistor such that the source of said high side transistor is connected to the drain of said low side transistor, the source of the high side transistor and the drain of the low side transistor forming an output node;

(3) a set of two bootstrap contact pads connected to the output node;

(4) a high side gate drive for selectively controlling the high side transistor;

(5) a low side gate drive for selectively controlling the low side transistor; and

(6) a set of two output contact pads connected to the output node, said output contact pads providing output signals to a load;

(b) a set of two carrier packages having a plurality of package pins including at least a bootstrap package pin and an output package pin, said carrier packages for securing said integrated circuit die;

(c) a set of two output bond wires connecting said output contact pads with said output package pins; and

(d) a set of two bootstrap bond wires connecting said bootstrap contact pads with said bootstrap package pins.

9. The package of claim 8 wherein said high side transistor and said low side transistor are NMOS transistors.

10. The package of claim 8 wherein said output contact pad and said bootstrap contact pad are the same.

11. The package of claim 8 wherein a first terminal of a bootstrap capacitor is connected to said bootstrap package pin and a second terminal of said bootstrap capacitor is connected to an input to said high side gate drive.

12. A method for driving a load using a high side switch and a low side switch connected in series, the source of said high side switch connected to the drain of said low side switch, the connection of said high side switch and said low side switch being an output node, the method comprising:

providing a bootstrap contact pad connected to said output node;

providing an output pad connected to said output node;

connecting a bootstrap capacitor to said bootstrap contact pad, said bootstrap capacitor used to provide a bootstrap power supply to a gate drive of said high side switch, wherein the bootstrap capacitor couples to the gate and the source of the high side transistor; and

connecting said output pad to said load.

13. An integrated circuit driver comprising:

a high side transistor;

a low side transistor connected in series to said high side transistor such that the source of said high side transistor is connected to the drain of said low side transistor, the source of the high side transistor and the drain of the low side transistor forming an output node;

a combination bootstrap/output contact pad connected to the output node;

a bootstrap capacitor having a first terminal connected to said bootstrap/output contact pad via a bootstrap capacitor package pin, wherein the bootstrap capacitor couples to the gate and the source of the high side transistor;

a high side gate drive for selectively controlling the high side transistor, said high side gate drive having as an input a signal from a second terminal of said bootstrap capacitor;

a low side gate drive for selectively controlling the low side transistor; and

an output package pin connecting said bootstrap/output contact pad to a load.

14. The driver of claim 13 wherein said high side transistor and said low side transistor are NMOS transistors.