High temperature coefficient MOS bias generation circuit

• US 6,946,896 B2
• Filed: 05/29/2003
• Issued: 09/20/2005
• Est. Priority Date: 05/29/2003
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Behzad, Arya Reza
• Primary Examiner(s): Zweizig, Jeffrey
• Application Number:
  US10/447,790
• Publication Number:
  US 20040239404A1
• Time in Patent Office: 845 Days
• Field of Search: 327/512, 327/513, 327/530, 327/534, 327/535, 327/537, 327/538, 327/540, 327/541, 327/542, 327/543, 327/545, 327/546
• US Class Current: 327/512
• CPC Class Codes: G05F 3/262 using field-effect transistors only

Abstract

A high temperature coefficient includes a temperature dependent bias generation circuit serially coupled with a variable resistance. The resistance of the variable resistance device increases with increasing temperature such that the output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device.

Claims

1. A high temperature coefficient circuit comprising:

a temperature dependent bias generation circuit serially coupled with a variable resistance device having a resistance that increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device, and wherein the output current of the high temperature coefficient circuit drives an inductive load.

2. The high temperature coefficient circuit of claim 1 wherein the temperature dependent bias generation circuit comprises a current mirror serially coupled to a first pair of parallel transistors.

3. The high temperature coefficient circuit of claim 2 wherein gate electrodes of the first pair of parallel transistors are coupled together.

4. The high temperature circuit of claim 3 wherein a drain electrode of a first transistor of the first parallel pair of transistors on a first leg of the bias generation circuit is coupled to the gate of the first transistor.

5. The high temperature coefficient circuit of claim 2 wherein the current mirror comprises a second pair of parallel transistors wherein a source of each of the second pair of parallel transistors is coupled to a drain of a unique one of the first pair of parallel transistors.

6. A high temperature coefficient circuit comprising:

a temperature dependent bias generation circuit serially coupled with a variable resistance device having a resistance that increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device, wherein the variable resistance device comprises a triode transistor, and

wherein the output current of the high temperature coefficient circuit drives an inductive load.

7. The high temperature coefficient circuit of claim 6 wherein the triode transistor comprises a MOS triode transistor.

8. The high temperature coefficient circuit of claim 6 wherein the inductive load comprises a MOS analog circuit.

9. The high temperature coefficient circuit comprising:

a temperature dependent bias generation circuit serially coupled with a variable resistance device having a resistance that increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device, wherein the temperature dependent bias generation circuit comprises a current mirror serially coupled to a first pair of parallel transistors, wherein gate electrodes of the first pair of parallel transistors are coupled together, and wherein a drain electrode of a first transistor of the first parallel pair of transistors an a first leg of the bias generation circuit is coupled to the gate of the first transistor; and

a temperature setting resistor serially coupled to a second transistor of the first parallel pair of transistors on a second leg of the bias generation circuit, the temperature setting resistor having a second resistance, wherein the output current of the high temperature coefficient circuit is inversely proportional to the second resistance of the temperature setting resistor.

10. An RF communication system, comprising:

a transmit node for transmitting an RF information signal, the transmit node comprising a high temperature coefficient circuit for biasing an amplifier, wherein the high temperature coefficient circuit comprises,

a temperature dependent bias generation circuit serially coupled with a variable resistance device having a resistance that increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device; and

a receive node for receiving the transmitted RF information signal.

11. The RF communication system of claim 10 wherein the temperature dependent bias generation circuit comprises a current mirror serially coupled to a first pair of parallel transistors.

12. The RF communication system of claim 10 wherein the variable resistance device comprises a triode transistor.

13. The RF communication system of claim 12 wherein the triode transistor comprises an MOS triode transistor.

14. A high temperature coefficient circuit comprising:

a current mirror serially coupled to a first pair of parallel transistors;

a variable resistance device serially coupled with a first transistor of the first pair of parallel transistors, wherein resistance of the variable resistance device increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device, wherein gate electrodes of the first pair of parallel transistors are coupled together, and wherein a drain electrode of the first transistor of the first parallel pair of transistors is coupled to the gate of the first transistor; and

a temperature setting resistor serially coupled to a second transistor of the first parallel pair of transistors, the temperature setting resistor having a second resistance, wherein the output current of the high temperature coefficient circuit is inversely proportional to the second resistance of the temperature setting resistor.

15. The high temperature coefficient circuit of claim 14 wherein gate electrodes of the first pair of parallel transistors are coupled together.

16. The high temperature coefficient circuit of claim 15 wherein a drain electrode of the first transistor of the first parallel pair of transistors is coupled to the gate of the first transistor.

17. The high temperature coefficient circuit of claim 14 wherein the current mirror comprises a second pair of parallel transistors wherein a source of each of the second pair of parallel transistors is coupled to a drain of a unique one of the first pair of parallel transistors.

18. A high temperature coefficient circuit comprising:

a current mirror serially coupled to a first pair of parallel transistors;

a variable resistance device serially coupled with a first transistor of the first pair of parallel transistors, wherein resistance of the variable resistance device increases with increasing temperature, wherein an output current of the high temperature coefficient circuit is proportional to the resistance of the variable resistance device, wherein the variable resistance device comprises a triode transistor, and wherein the output current of the high temperature coefficient circuit drives an inductive load.

19. The high temperature coefficient circuit of claim 18 wherein the triode transistor comprises an MOS triode transistor.