Method of manufacturing a semiconductor device having thin film transistor and capacitor
First Claim
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1. A method of fabricating a semiconductor device comprises steps of:
- forming an active layer over a substrate;
forming an insulating film containing silicon on said active layer;
exposing a portion of said active layer by removing a part of said insulating film containing silicon;
forming a first insulating film over the exposed portion of said active layer;
forming a gate wiring and a second capacitance electrode over said insulating film containing silicon and said first insulating film;
forming a first interlayer insulating film over said gate wiring and said second capacitance electrode;
exposing a portion of said second capacitance electrode by removing a part of said first interlayer insulating film;
forming a second dielectric over the exposed portion of said second capacitance electrode;
forming a light-shielding film over said first interlayer insulating film and said second dielectric;
forming a second interlayer insulating film over said light-shielding film;
forming a source wiring or a drain wiring over said second interlayer insulating film;
forming a third interlayer insulating film over said source wiring or said drain wiring; and
forming a pixel electrode, over said third interlayer insulating film, electrically connected with said light-shielding film and said drain wiring.
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Abstract
A method of manufacturing a semiconductor with a storage capacitor having sufficient memory capacity while requiring a minimum area is provided. The method includes steps for manufacturing a storage capacitor of a pixel region that has a structure of a first storage capacitor and a second storage capacitor stacked on top of the other and connected in parallel with each other. The method further includes steps for forming the first storage capacitor having a first capacitance electrode formed in the same layer as a drain region, a first dielectric, and a second capacitance electrode formed in the same layer as a gate wiring. Still further, the method includes steps for forming the second storage capacitor including the second capacitance electrode, a second dielectric, and a third capacitance electrode formed in the same layer as a light-shielding film.
120 Citations
42 Claims
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1. A method of fabricating a semiconductor device comprises steps of:
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forming an active layer over a substrate;
forming an insulating film containing silicon on said active layer;
exposing a portion of said active layer by removing a part of said insulating film containing silicon;
forming a first insulating film over the exposed portion of said active layer;
forming a gate wiring and a second capacitance electrode over said insulating film containing silicon and said first insulating film;
forming a first interlayer insulating film over said gate wiring and said second capacitance electrode;
exposing a portion of said second capacitance electrode by removing a part of said first interlayer insulating film;
forming a second dielectric over the exposed portion of said second capacitance electrode;
forming a light-shielding film over said first interlayer insulating film and said second dielectric;
forming a second interlayer insulating film over said light-shielding film;
forming a source wiring or a drain wiring over said second interlayer insulating film;
forming a third interlayer insulating film over said source wiring or said drain wiring; and
forming a pixel electrode, over said third interlayer insulating film, electrically connected with said light-shielding film and said drain wiring. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of manufacturing a semiconductor device comprising the steps of:
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forming at least one semiconductor island comprising silicon on an insulating surface;
forming a first insulating film over said semiconductor island;
removing a portion of the first insulating film so that a first portion of the semiconductor island is exposed while a second portion of the semiconductor island is covered by the first insulating film;
performing a thermal oxidation on said semiconductor island so that a surface of the first portion of the semiconductor island is oxidized to form a first dielectric of a first capacitor on the first portion of the semiconductor island;
forming a conductive film over the first insulating film and the first dielectric;
patterning the conductive film to form a gate electrode and a first capacitor electrode wherein the gate electrode is located over the second portion of the semiconductor island and the first capacitor electrode is located over the first portion of the semiconductor island;
forming a first interlayer insulating film over the gate electrode and the first capacitor electrode;
forming an opening in the first interlayer insulating film so that at least a portion of the first capacitor electrode is exposed in the opening;
forming a second dielectric of a second capacitor on the first capacitor electrode;
forming a second capacitor electrode over the first capacitor electrode with the second dielectric interposed therebetween;
forming a second interlayer insulating film over the second capacitor electrode; and
forming a pixel electrode over the second interlayer insulating film, wherein said pixel electrode is electrically connected to said semiconductor island. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A method of manufacturing a semiconductor device comprising steps of:
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forming at least one semiconductor island comprising silicon on an insulating surface;
forming a first insulating film over said semiconductor island;
removing a portion of the first insulating film so that a first portion of the semiconductor island is exposed while a second portion of the semiconductor island is covered by the first insulating film;
forming a first dielectric of a first capacitor on the first portion of the semiconductor island wherein said first insulating film is thicker than the first dielectric;
forming a gate electrode and a first capacitor electrode wherein the gate electrode is located over the second portion of the semiconductor island and the first capacitor electrode is located over the first portion of the semiconductor island;
forming a first interlayer insulating film over the gate electrode and the first capacitor electrode;
forming an opening in the first interlayer insulating film so that at least a portion of the first capacitor electrode is exposed in the opening;
forming a second dielectric of a second capacitor on the first capacitor electrode;
forming a second capacitor electrode over the first capacitor electrode with the second dielectric interposed therebetween;
forming a second interlayer insulating film over the second capacitor electrode; and
forming a pixel electrode over the second interlayer insulating film, wherein said pixel electrode is electrically connected to said semiconductor island. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A method of manufacturing a semiconductor device comprising steps of:
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forming at least one semiconductor island comprising silicon on an insulating surface;
forming a first insulating film over said semiconductor island;
removing a portion of the first insulating film so that a first portion of the semiconductor island is exposed while a second portion of the semiconductor island is covered by the first insulating film;
forming a first dielectric of a first capacitor on the first portion of the semiconductor island wherein said first insulating film is thicker than the first dielectric;
forming a gate electrode and a first capacitor electrode wherein the gate electrode is located over the second portion of the semiconductor island and the first capacitor electrode is located over the first portion of the semiconductor island;
forming a protective film on the gate electrode, the first capacitor electrode the first insulating film, and a first dielectric wherein the protective film comprises silicon, oxygen and nitrogen;
forming a first interlayer insulating film on the protective film;
forming an opening in the first interlayer insulating film and the protective film so that at least a portion of the first capacitor electrode is exposed in the opening;
forming a second dielectric of a second capacitor on the first capacitor electrode;
forming a second capacitor electrode over the first capacitor electrode with the second dielectric interposed therebetween;
forming a second interlayer insulating film over the second capacitor electrode; and
forming a pixel electrode over the second interlayer insulating film, wherein said pixel electrode is electrically connected to said semiconductor island. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41, 42)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsFukunaga, Takeshi, Ikeda, Takayuki, Yamazaki, Shunpei
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Primary Examiner(s)LE, DUNG ANH
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Application NumberUS10/603,019Publication NumberTime in Patent Office845 DaysField of Search438162-166US Class Current438/162CPC Class CodesH01L 27/1237 with a different compositio...H01L 27/124 with a particular compositi...H01L 27/1255 integrated with passive dev...H01L 27/1259 Multistep manufacturing met...H01L 29/66757 Lateral single gate single ...H01L 29/78621 with LDD structure or an ex...H01L 29/78627 with a significant overlap ...H01L 29/78633 with a light shieldH01L 29/78645 with multiple gateH01L 29/78675 with normal-type structure,...
