Pixel sensor cell for use in an imaging device

• US 6,960,795 B2
• Filed: 01/14/2003
• Issued: 11/01/2005
• Est. Priority Date: 06/15/1999
• Status: Expired due to Term

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Micron Technology, Inc.
• Inventors: Rhodes, Howard E.
• Primary Examiner(s): Fourson, George
• Assistant Examiner(s): Toledo, Fernando L.
• Application Number:
  US10/341,368
• Publication Number:
  US 20030137025A1
• Time in Patent Office: 1,022 Days
• Field of Search: 257/114, 257/215, 257/233
• US Class Current: 257/215
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14645 Colour imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon

Abstract

A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.

Claims

1. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a substrate;

a first gate oxide layer formed over at least a portion of said substrate;

a first gate formed over said first gate oxide layer, said first gate comprising a first conductive layer formed over said first gate oxide layer, an insulating layer formed over the first conductive layer, a barrier metal layer formed over the first conductive layer, and insulating spacers formed on the sides of said first gate;

a second gate oxide layer separate from said first gate oxide layer formed over at least a portion of said substrate, wherein said second gate oxide layer is adjacent to an insulating spacer of said first gate and adjacent to said first gate oxide layer; and

a second gate formed over said second gate oxide layer, said second gate comprising a second conductive layer formed over said second gate oxide layer and extending at least partially over said first gate.

2. The pixel sensor cell of claim 1, wherein the insulating layer is a layer of material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, ON, NO, and ONO.

3. The pixel sensor cell of claim 1, wherein the first conductive layer is a layer of doped polysilicon.

4. The pixel sensor cell of claim 1, wherein the barrier metal is titanium nitride.

5. The pixel sensor cell of claim 1, wherein the barrier metal is tungsten nitride.

6. The pixel sensor cell of claim 1, wherein said first gate further comprises a tungsten layer formed over the barrier metal layer.

7. The pixel sensor cell of claim 1, wherein said first gate further comprises a silicide layer formed over the first conductive layer.

8. The pixel sensor cell of claim 7, wherein the silicide layer is a layer of metal silicide selected from the group consisting of titanium suicide, tungsten silicide, molybdenum silicide, tantalum silicide, platinum silicide, palladium silicide, iridium silicide, and cobalt suicide.

9. The pixel sensor cell of claim 1, wherein the insulating layer is a deposited silicon oxide layer.

10. The pixel sensor cell of claim 1, wherein the insulating layer material is silicon nitride.

11. The pixel sensor cell of claim 1, wherein the insulating layer is ON.

12. The pixel sensor cell of claim 1, wherein the insulating layer is NO.

13. The pixel sensor cell of claim 1, wherein the insulating material is ONO.

14. The pixel sensor cell of claim 1, wherein the insulating spacers are silicon oxide spacers.

15. The pixel sensor cell of claim 1, wherein the insulating spacers are silicon nitride spacers.

16. The pixel sensor cell of claim 1, wherein the insulating spacers are silicon oxynitride spacers.

17. The pixel sensor cell of claim 1, wherein the insulating spacers are ON spacers.

18. The pixel sensor cell of claim 1, wherein the insulating spacers are NO spacers.

19. The pixel sensor cell of claim 1, wherein the insulating spacers are ONO spacers.

20. The pixel sensor cell of claim 1, wherein the second conductive layer is a layer of doped polysilicon.

21. The pixel sensor cell of claim 1, wherein the second conductive layer is a layer of semitransparent conductive material.

22. The pixel sensor cell of claim 21, wherein the semitransparent conductive material is tin oxide.

23. The pixel sensor cell of claim 21, wherein the semitransparent conductive material is indium tin oxide.

24. The pixel sensor of claim 21, wherein the semitransparent conductive material is a layer of doped polysilicon.

25. The pixel sensor cell of claim 1, wherein said second gate further comprises a barrier metal layer formed over the second conductive layer.

26. The pixel sensor of claim 25, wherein the barrier metal is titanium nitride.

27. The pixel sensor of claim 25, wherein the barrier metal is tungsten nitride.

28. The pixel sensor cell of claim 25, wherein said second gate further comprises a tungsten layer formed over the barrier metal layer.

29. The pixel sensor cell of claim 1, wherein said second gate further comprises a silicide layer formed over the second conductive layer.

30. The pixel sensor cell of claim 1, wherein the imaging device is a CMOS imager.

31. The pixel sensor cell of claim 1, wherein the imaging device is a CCD imager.

32. The pixel sensor cell of claim 1, wherein said first gate is a source follower gate and said second gate is a row select gate.

33. The pixel sensor cell of claim 1, wherein said first gate is a row select gate and said second gate is a source follower gate.

34. The pixel sensor cell of claim 1, wherein said first gate is a transfer gate and said second gate is a photogate.

35. The pixel sensor cell of claim 1, wherein said first gate is a photogate and said second gate is a transfer gate.

36. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a substrate;

a first insulating layer formed over at Least a portion of said substrate;

a multi-layered transfer gate stack formed over said first insulating layer, said multi-layered transfer gate stack comprising a first conductive layer formed over said first insulating layer, a second insulating layer formed over the first conductive layer, a barrier metal layer formed over the first conductive layer, and insulating spacers formed on sides of said multi-layered transfer gate stack;

a photogate implant region formed self-aligned to an edge of said multi-layered transfer gate stack;

a gate oxide layer separate from said first insulating layer formed over at least a portion of said substrate and said photogate implant region, wherein said gate oxide layer is adjacent to an insulating spacer of said multi-layered transfer gate stack and adjacent to said first insulating layer; and

a semi-transparent photogate conductor formed over at least a portion of said multi-layered transfer gate stack, said photogate implant region and said gate oxide layer.

37. The pixel sensor cell of claim 36, wherein said multi-layered transfer gate stack further comprises a silicide layer formed over said first conductive layer.

38. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a substrate;

a first gate oxide layer formed over at least a portion of said substrate;

a multi-layered photogate formed over said first gate oxide layer, said multi-layered photogate comprising a first conductive layer formed over said first gate oxide layer, an insulating layer formed over the first conductive layer, and insulating spacers formed on sides of said multi-layered photogate;

a second gate oxide layer separate from said first gate oxide layer formed over at least a portion of said substrate and self-aligned to an edge of at least one insulating spacer, and adjacent to said first gate oxide layer; and

a transfer gate formed over at least a portion of said multi-layered photogate, said transfer gate comprising a second conductive layer formed over at least a portion of said second gate oxide layer and said multi-layered photogate, wherein said transfer gate further comprises a barrier metal layer formed over said second conductive layer.

39. The pixel sensor cell of claim 38, wherein said transfer gate further comprises a silicide layer formed over said second conductive layer.

40. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a substrate;

a first gate oxide layer formed over at least a portion of said substrate;

a first gate formed over said first gate oxide layer, said first gate comprising a first conductive layer formed over said first gate oxide layer, an insulating layer formed over the first conductive layer, and insulating spacers formed on the sides of said first gate;

a second gate oxide layer separate from said first gate oxide layer formed over at least a portion of said substrate, wherein said second gate oxide layer is adjacent to an insulating spacer of said first gate and adjacent to said first gate oxide layer; and

a second gate formed over said second gate oxide layer, said second gate comprising a second conductive layer formed over said second gate oxide layer and extending at least partially over said first gate, wherein a barrier metal layer is formed over the second conductive layer.

41. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:

a substrate;

a first insulating layer formed over at least a portion of said substrate;

a multi-layered transfer gate stack formed over said first insulating layer, said multi-layered transfer gate stack comprising a first conductive layer formed over said first insulating layer, a second insulating layer formed over the first conductive layer, a silicide layer formed over said first conductive layer, and insulating spacers formed on sides of said multi-layered transfer gate stack;

a photogate implant region formed self-aligned to an edge of said multi-layered transfer gate stack;

a gate oxide layer separate from said first insulating layer formed over at least a portion of said substrate and said photogate implant region, wherein said gate oxide layer is adjacent to an insulating spacer of said multi-layered transfer gate stack and adjacent to said first insulating layer; and

a semi-transparent photogate conductor formed over at least a portion of said multi-layered transfer gate stack, said photogate implant region and said gate oxide layer.