Hybrid active and electronic circuit with evanescent coupling

• US 6,963,118 B2
• Filed: 12/16/2003
• Issued: 11/08/2005
• Est. Priority Date: 05/17/2001
• Status: Expired due to Term

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Sioptical Inc. (Cisco Systems, Inc.)
• Inventors: Patel, Vipulkumar, Deliwala, Shrenik
• Primary Examiner(s): Tran, Minhloan
• Assistant Examiner(s): Dickey, Thomas L.
• Application Number:
  US10/737,343
• Publication Number:
  US 20040129949A1
• Time in Patent Office: 693 Days
• Field of Search: 257/81, 257/83, 257/84, 257/91, 257/95, 257 98-100, 257/275, 257/347, 257/428, 385/14, 385 31- 38, 385/49, 385/88, 385/89, 385/92, 385/94
• US Class Current: 257/428
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 2006/12097 Ridge, rib or the like
• CPC Class Codes: G02B 2006/12104 Mirror; Reflectors or the like
• CPC Class Codes: G02B 2006/12107 Grating
• CPC Class Codes: G02B 2006/12114 Prism
• CPC Class Codes: G02B 2006/12135 Temperature control
• CPC Class Codes: G02B 2006/12161 Distributed feedback [DFB]
• CPC Class Codes: G02B 2006/12164 Multiplexing; Demultiplexing
• CPC Class Codes: G02B 2006/12176 Etching
• CPC Class Codes: G02B 27/1086 operating by diffraction only
• CPC Class Codes: G02B 27/144 using partially transparent surfaces without spectral selectivity G02B27/147 takes precedence
• CPC Class Codes: G02B 27/145 having sequential partially reflecting surfaces
• CPC Class Codes: G02B 27/285 comprising arrays of elements, e.g. microprisms
• CPC Class Codes: G02B 5/045 Prism arrays
• CPC Class Codes: G02B 6/10 of the optical waveguide type G02B6/02, G02B6/24 take precedence; devices or arrangements for the control of light by electric, magnetic, electro-magnetic or acoustic means G02F1/00; transferring the modulation of modulated light G02F2/00; optical logic elements G02F3/00; optical analogue/digital converters G02F7/00
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/12007 forming wavelength selective elements, e.g. multiplexer, demultiplexer
• CPC Class Codes: G02B 6/12026 characterised by means for reducing the temperature dependence
• CPC Class Codes: G02B 6/12033 characterised by means for configuring the device, e.g. moveable element for wavelength tuning switching G02B6/35; thermo-optic devices G02F1/0147
• CPC Class Codes: G02B 6/1225 : comprising photonic band-gap structures or photonic lattices
• CPC Class Codes: G02B 6/1228 : Tapered waveguides, e.g. integrated spot-size transformers for coupling with fibres G02B6/305
• CPC Class Codes: G02B 6/124 : Geodesic lenses or integrated gratings
• CPC Class Codes: G02B 6/2861 : using fibre optic delay lines and optical elements associated with them, e.g. for use in signal processing, e.g. filtering delay lines in general H03H, H01P9/00; optical computing devices G06E
• CPC Class Codes: G02B 6/34 : utilising prism or grating G02B6/293 takes precedence
• CPC Class Codes: G02B 6/4232 : using the surface tension of fluid solder to align the elements, e.g. solder bump techniques flip-chip mounting techniques in assembly of semiconductor devices H01L24/81
• CPC Class Codes: G02B 6/43 : Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
• CPC Class Codes: G02F 1/0147 : based on thermo-optic effects G02F1/132 takes precedence
• CPC Class Codes: G02F 1/0152 : using free carrier effects, e.g. plasma effect
• CPC Class Codes: G02F 1/025 : in an optical waveguide structure G02F1/017, G02F1/2257 take precedence
• CPC Class Codes: G02F 1/295 : Analog deflection from or in an optical waveguide structure]
• CPC Class Codes: G02F 2201/20 : delay line
• CPC Class Codes: H01L 27/1203 : the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688

Abstract

A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

Claims

1. A hybrid active electronic and optical circuit integrated within a Silicon-On-Insulator (SOI) wafer, the SOI wafer including an insulator layer and an upper silicon layer having a thickness of less than 3 μ

m, the hybrid active electronic and optical circuit comprising;

a relatively narrow waveguide located within the upper silicon layer of the SOI wafer for supporting the propagation of light, said relatively narrow waveguide having a thickness of less than 3 μ

m;

an active electronic circuit positioned proximate the relatively narrow waveguide, wherein a flow of light through the relatively narrow waveguide can be altered depending on a property of the active electronic circuit;

a light deflector at least partially located in the upper silicon layer, the light deflector is configured to redirect light propagating within the upper silicon layer into a predetermined mode angle associated with the relatively narrow waveguide; and

an evanescent coupling region at least partially located within the upper silicon layer, the evanescent coupling region including a gap region positioned in the plane of the upper silicon layer between the light deflector and the relatively narrow waveguide for optically coupling the redirected light propagating within the upper silicon layer into the relatively narrow waveguide, such that light redirected from the light deflector can pass via the evanescent coupling gap region to the relatively narrow waveguide at the predetermined mode angle.

2. The hybrid active electronic and optical circuit of claim 1, wherein the gap region includes a substantially constant width.

3. The hybrid active electronic and optical circuit of claim 1, wherein the gap region includes a tapered gap portion.

4. The hybrid active electronic and optical circuit of claim 1, further including at least one optical device, wherein altering an electric voltage applied to the active electronic circuit affects a free carrier distribution in a region of the at least one optical device, and thereby changes an effective mode index of the at least one optical device.

5. The hybrid active electronic and optical circuit of claim 1, wherein the evanescent coupling gap region has a width of less than 9.5 μ

m.

6. The hybrid active electronic and optical circuit of claim 1, wherein the hybrid active electronic and optical circuit includes a Fabry-Perot cavity.

7. The hybrid active electronic and optical circuit of claim 1, wherein the hybrid active electronic and optical circuit includes a wavelength division multiplexer modulator.

8. The hybrid active electronic and optical circuit of claim 1, wherein the hybrid active electronic and optical circuit includes a diode.

9. The hybrid active electronic and optical circuit of claim 1, wherein the hybrid active electronic and optical circuit includes a transistor.

10. The hybrid active electronic and optical circuit of claim 1, wherein the hybrid circuit includes one from the group of a p-n device, a field plated device, a Schottky device, a MOSCAP, and a MOSFET.

11. The hybrid active electronic and optical circuit of claim 1, wherein the light deflector comprises an optical grating formed in the upper silicon layer.

12. The hybrid active electronic and optical circuit of claim 1, wherein the light deflector comprises an optical prism formed in the upper silicon layer.

13. The hybrid active electronic and optical circuit of claim 12 wherein the light deflector comprises regions of different effective mode indices to create a prism-like region in the upper silicon layer.

14. The hybrid active electronic and optical circuit of claim 1, wherein the light deflector comprises an optical lens formed in the upper silicon layer.

15. The hybrid active electronic and optical circuit of claim 1, wherein the evanescent coupling region electrically isolates the relatively narrow waveguide from the remaining portion of the light propagating upper silicon layer.

16. A hybrid active electronic and optical circuit integrated within a wafer, the water including an insulator layer and an upper silicon layer, the hybrid active electronic and optical circuit comprising:

a relatively thin waveguide located within the upper silicon layer of the SOI wafer for supporting the propagation of light;

an active electronic circuit positioned proximate the waveguide, wherein a flow of light through the waveguide can be altered depending on a property of the active electronic circuit;

a light deflector at least partially located in the upper silicon layer, the light deflector configured to redirect into a predetermined mode angle associated with the relatively narrow waveguide; and

an evanescent coupling region at least partially located within the upper silicon layer, the evanescent coupling region including a gap region positioned between the light deflector and the relatively narrow waveguide for optically coupling the redirected light into the waveguide, such that light emitted from the light deflector can pass via the evanescent coupling gap region to the relatively narrow waveguide at a suitable mode angle.