Microelectronic mechanical system and methods

• US 6,991,953 B1
• Filed: 03/28/2002
• Issued: 01/31/2006
• Est. Priority Date: 09/13/2001
• Status: Active Grant

• Current Assignee: Silicon Light Machines Corporation (SCREEN Holdings Co., Ltd.)
• Original Assignee: Silicon Light Machines Corporation (SCREEN Holdings Co., Ltd.)
• Inventors: Hunter, Jim, Bruner, Mike, Yeh, Richard
• Primary Examiner(s): WILCZEWSKI, MARY A
• Application Number:
  US10/112,962
• Time in Patent Office: 1,405 Days
• Field of Search: 483/29, 483/32, 483/735, 483/737, 483/738, 483/739, 438/740, 438/29, 438/32, 438/737, 438/739, 438/735, 438/738, 257/680, 216/2, 216/99
• US Class Current: 438/29
• CPC Class Codes: B81B 2201/0271 Resonators; ultrasonic resonators
• CPC Class Codes: B81B 2203/0136 Comb structures
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 1/00484 Processes for releasing structures not provided for in group B81C1/00476
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/014 by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit

Abstract

The current invention provides for encapsulated release structures, intermediates thereof and methods for their fabrication. A multi-layer structure has a capping layer, that preferably comprises silicon oxide and/or silicon nitride, and which is formed over an etch resistant substrate. A patterned device layer, preferably comprising silicon nitride, is embedded in a sacrificial material, preferably comprising poly-silicon, and is disposed between the etch resistant substrate and the capping layer. Access trenches or holes are formed in to capping layer and the sacrificial material is selectively etched through the access trenches, such that portions of the device layer are release from sacrificial material. The etchant preferably comprises a noble gas fluoride NGF_2x, (wherein NG=Xe, Kr or Ar: and where x=1, 2 or 3). After etching that sacrificial material, the access trenches are sealed to encapsulate released portions the device layer between the etch resistant substrate and the capping layer. The current invention is particularly useful for fabricating MEMS devices, multiple cavity devices and devices with multiple release features.

Claims

1. A method of making a spatial light modulator comprising:

a. embedding a device layer comprising ribbon features in a sacrificial material;

b. forming a capping structure with at least one access trench;

c. etching the sacrificial material using an etchant comprising a noble gas fluoride through the at least one access trench to release the ribbon features from the sacrificial material, wherein a partial pressure of water is maintained at 5×

10<sup>−

4</sup> Torr or less during the etching of the sacrificial material and the device layer is cooled during the etching of the sacrificial material; and

d. sealing the at least one access trench with a sealing material thereby encapsulating the ribbon features within a sealed cavity comprising a predetermined environment.

2. The method of claim 1, wherein embedding the device layer comprises:

a. depositing a first layer of the sacrificial material on a substrate surface;

b. forming the device layer over the first layer of sacrificial material; and

c. depositing a second layer of the sacrificial material over the device layer.

3. The method of claim 2, wherein the substrate surface comprises a material selected from the group consisting of an oxide, an oxynitride, and a nitride of silicon.

4. The method of claim 1, wherein the device layer comprises a material selected from the group consisting of oxides, oxynitrides and nitrides of silicon.

5. The method of claim 1, wherein the capping structure comprises a material selected from the group consisting of oxides, oxynitrides, and nitrides of silicon.

6. The method of claim 1, wherein the sacrificial material comprises poly-silicon.

7. The method of claim 1, wherein forming the capping structure comprises:

a. depositing a layer of capping material; and

b. anisotropically etching the capping material to form the at least one access trench.

8. The method of claim 1, wherein the noble gas fluoride comprises xenon difluoride.

9. The method of claim 1, wherein the sacrificial material is selectively etched relative to the capping structure by a rate (mass/time) of greater than 50:

1.

10. The method of claim 1, wherein the sealing material comprises a material selected from the group consisting of polymers, metals and ceramics.

11. The method of claim 1, further comprising treating the sacrificial material with ethylene glycol and ammonium fluoride through the at least one access trench prior to etching.

12. The method of claim 2, wherein forming the device layer comprises:

a. depositing a silicon nitride-based layer on the first layer of the sacrificial material; and

b. patterning the ribbon features into the silicon nitride-based layer.

13. The method of claim 12, wherein patterning the ribbon features into the silicon nitride-based layer comprises:

a. forming a mask on the silicon nitride-based layer; and

b. etching the ribbon features into the silicon nitride-based layer through the mask.

14. The method of claim 13, wherein the mask is formed of a photo-resist, the method further comprising cleaning the device layer with a solvent after etching the ribbon features into the silicon nitride-based layer.

15. The method of claim 14, wherein the solvent comprises N-methyl-2-pyrolipone.