Stacked variable inductor

• US 6,992,366 B2
• Filed: 09/29/2003
• Issued: 01/31/2006
• Est. Priority Date: 11/13/2002
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Park, Mun Yang, Yu, Hyun Kyu, Kim, Cheon Soo, Park, Pil Jae
• Primary Examiner(s): Trinh, Michael
• Assistant Examiner(s): BRYANT, KIESHA ROSE
• Application Number:
  US10/671,637
• Publication Number:
  US 20040140528A1
• Time in Patent Office: 855 Days
• Field of Search: 257/531, 257/528, 330/277, 438/381
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 21/12 discontinuously variable, e.g. tapped
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

Disclosed is a stacked variable inductors manufactured by stacking M (M≧2) metal layers on a semiconductor substrate, and provides stacked variable inductors comprising, 1 to N inductors continuously connected in serial, wherein each of said inductors is formed on N (N≦M) metal layers that are different each other; first and second ports each connected to the highest positioned inductor and to the lowest positioned inductor among said 1 to N inductors; and at least one MOSFET, and wherein one terminal of at least one MOSFET is connected to one of the first and second ports, and the other one is connected to one of adjacent terminals connected in serial between 1 to N inductors.

Claims

1. Stacked variable inductors manufactured by stacking M (M≧

2) metal layers on a semiconductor substrate using CMOS technology, comprising;

1 to N inductors continuously connected in serial, wherein each of said inductors is formed on N (N≦

M) metal layers that are different from each other;

first and second ports connected to the highest inductor and to the lowest inductor, respectively among said 1 to N inductors; and

at least one MOSFET, wherein one terminal of said at least one MOSFET is connected to one of said first and second ports, and the other one terminal is connected to one of adjacent terminals connected in serial between said 1 to N inductors.

2. The stacked variable inductors as claimed in claim 1, wherein said N is equal to or above 2 and below 4.

3. The stacked variable inductors as claimed in claim 1, wherein turns of at least two of said 1 to N inductors are made different each other.

4. The stacked variable inductors as claimed in claim 1, wherein total inductance of said 1 to N inductors serially connected through ON/OFF of said MOSFET can be made to vary.

5. The stacked variable inductors as claimed in claim 1, wherein each of turns of said 1 to N inductors gradually decreases or increases from the lower position of the substrate to the upper position.

6. The stacked variable inductors as claimed in claim 1, wherein said M is not less than 3 and said N is 3, and said MOSFET consists of first MOSFET and second MOSFET,

one terminal of said first MOSFET being connected to one of said ports, the other terminal being connected to a serially connected terminal between said first and second inductors,

one terminal of said second MOSFET being connected to said port to which said first MOSFET is connected, and the other terminal being connected to a serially connected terminal between said second and third inductors.

7. The stacked variable inductors as claimed in claim 1, wherein said M is not less than 3 and said N is 3, and said MOSFET consists of first MOSFET and second MOSFET,

one terminal of said first MOSFET being connected to one of said ports, the other terminal being connected to a serially connected terminal between said first and second inductors,

one terminal of said second MOSFET being connected to a serially connected terminal between said first and second inductors, the other terminal being connected to a serially connected terminal between said second and third inductors.

8. The stacked variable inductors as claimed in claim 1, wherein a signal for multi band including at least two bands among 900 MHz, 1.5 GHz, 1.9 GHz, 2.4 GHz, and 5.2 GHz is input to said stacked variable inductors.

9. The stacked variable inductors as claimed in claim 1, wherein said stacked variable inductors operate in an operation frequency not less than 2 GHz.