Digitally controlled vertical S linearity correction with constant amplitude without using an AGC

• US 6,998,798 B1
• Filed: 08/10/2004
• Issued: 02/14/2006
• Est. Priority Date: 08/10/2004
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Guan, Charles, Hojabri, Peyman
• Primary Examiner(s): Dinh, Trinh Vo
• Assistant Examiner(s): VY, HUNG T
• Application Number:
  US10/915,135
• Time in Patent Office: 553 Days
• Field of Search: 315/370, 315/364, 315365-366, 315368- 18, 315/367
• US Class Current: 315/370
• CPC Class Codes: G09G 1/04 Deflection circuits ; Constructional details not otherwise provided for electron-optical arrangements H01J29/46, H01J37/04, H01J37/302

Abstract

A digitally-controlled vertical S linearity correction with a constant amplitude without using an AGC. To preserve line spacing between horizontal lines toward a top and bottom of a screen a third order correction voltage V_cube is applied to a sweep voltage V_osc. A constant current decoder determines an amount of appropriate correction current, which is employed to generate a sweep voltage with modified amplitude due to S correction and one without the modified amplitude. The sweep voltage with constant amplitude is employed to generate V_cube. V_cube is then applied to the sweep voltage along with a compensated amplitude component of the sweep voltage, such that a reduction in the amplitude caused by the S correction is compensated in the output voltage V_out. The compensation of the output voltage amplitude prevents a size reduction of the displayed picture on the screen without employing an iterative auto-align process.

Claims

1. A device for performing S linearity correction, comprising:

a ramp generation and amplitude control circuit that is arranged to receive a plurality of digital signals, and to provide a sawtooth-shaped sweep voltage and an amplitude correction signal in response to the plurality of digital signals;

a ramp conditioning circuit that is arranged to provide an amplitude modulated sweep voltage and an unmodulated sweep voltage in response to the sawtooth-shaped sweep voltage and the amplitude correction signal;

a waveform generation circuit that is arranged to provide a third order voltage based, in part, on the unmodulated sweep voltage; and

a correction circuit that is arranged to provide a corrected output voltage based, in part, on the amplitude modulated sweep voltage and the third order voltage, such that a line spacing between horizontal lines toward a top and a bottom of a screen is substantially equal to another line spacing in a middle of the screen, and such that a size of a displayed picture is substantially maintained before and after an application of S linearity correction.

2. The device of claim 1, wherein the plurality of digital signals comprises:

a first digital signal that indicates an amplitude for the sweep voltage; and

a second digital signal that indicates an amount of S linearity correction.

3. The device of claim 1, wherein the correction circuit comprises at least one summing amplifier that is arranged to provide the corrected output voltage based on a combination of the third order voltage and the amplitude modulated sweep signal.

4. The device of claim 1, wherein the corrected output voltage is arranged to control a vertical deviation of an electron beam during its horizontal sweep in a Cathode Ray Tube (CRT) such that line spacing between horizontal lines toward the top and bottom edges of the screen is substantially equal to line spacing in the middle of the screen.

5. The device of claim 1, wherein the ramp generation and amplitude control circuit comprises:

a constant current decoder that is arranged to provide a first correction signal that includes S linearity correction information and a second correction signal that includes amplitude correction information in response to the plurality of digital signals;

a threshold generator that is arranged to provide a high limit voltage, a low limit voltage, and a threshold voltage in response to the first correction signal such that an upper and a lower limit of a sweep voltage are determined; and

a ramp generator that is arranged to provide the sweep voltage in response to the high limit voltage, the low limit voltage, and the threshold voltage such that an amplitude of the sweep voltage is determined based, in part, on the S linearity correction.

6. The device of claim 5, wherein the threshold generator comprises a resistor ladder and at least one of a current-controlled current source and a voltage-controlled current source.

7. The device of claim 5, wherein the ramp generator comprises at least one of a voltage-controlled voltage source and a current-controlled voltage source.

8. The device of claim 1, wherein the ramp conditioning circuit comprises a digitally-controlled attenuator circuit that is arranged to provide:

the unmodulated sweep voltage to the waveform generation circuit; and

the modulated sweep voltage to the correction circuit.

9. The device of claim 8, wherein a resistance of each resistor in the digitally-controlled attenuator is determined based, in part, on a second correction signal provided by the ramp generation and amplitude control circuit.

10. The device of claim 8, wherein the ramp conditioning circuit is further arranged to provide an unmodulated inverted sweep voltage to the waveform generation circuit.

11. The device of claim 8, wherein the waveform generation circuit includes a waveform generator that is arranged to provide a second order voltage, a third order voltage, and a fourth order voltage in response to the unmodulated sweep voltage, the inverted unmodulated sweep voltage, and the reference voltage.

12. The device of claim 11, wherein:

the second order voltage is provided to a vertical C linearity correction circuit; and

the fourth order voltage is provide to a top-and-bottom corner correction circuit.

13. The device of claim 11, wherein the waveform generation circuit further includes an operational amplifier that is arranged to operate as a follower to provide the third order voltage to the correction circuit.

14. The device of claim 11, wherein the waveform generation circuit is further arranged to provide at least one of a fifth order voltage, a seventh order voltage, and a ninth order voltage;

and wherein the correction circuit is further arranged to provide the corrected output voltage based, in part, on one of the fifth order voltage, the seventh order voltage, and the ninth order voltage.

15. A device for performing nth order linearity correction, comprising:

a first circuit that is arranged to generate a sawtooth-shaped ramping signal;

a second circuit that is arranged to modulate an amplitude of the ramping signal based on a received amount of nth order linearity correction;

a third circuit that is arranged to generate an nth order voltage based on the ramping voltage, wherein n=2k+1 and k is a positive integer; and

a fourth circuit that is arranged to combine the amplitude modulated ramping voltage and the nth order voltage, and to provide a corrected output voltage such that a line spacing between horizontal lines toward a top and a bottom of a screen is substantially equal to another line spacing in a middle of the screen, and a size of a displayed picture is substantially maintained after the nth order linearity correction.