CAM cells and differential sense circuits for content addressable memory (CAM)

DC CAFC
  • US 6,999,331 B2
  • Filed: 02/27/2004
  • Issued: 02/14/2006
  • Est. Priority Date: 10/04/2001
  • Status: Active Grant
First Claim
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1. A ternary content addressable memory (TCAM) comprising:

  • an array of TCAM cells arranged in a plurality of rows and a plurality of columns;

    a plurality of match lines, one match line for each row of TCAM cells and operatively coupled to a plurality of output transistors for the TCAM cells in each row;

    a plurality of dummy lines, one dummy line for each row of TCAM cells and operatively coupled to a plurality of dummy transistors for the TCAM cells in each row;

    a plurality of match data bit lines and their complements, one pair of match data bit line and its complement for each column of TCAM cells to provide a match data and its complement to compare with the content stored in each TCAM cell of that column;

    a column of dummy TCAM (DTCAM) cells, each connected to the match line and the dummy line in each row;

    a pair of dummy match data bit line and its complement for the column of DTCAM cells to provide a dummy match data and its complement to compare with the content stored in each DTCAM cell;

    a sense amplifier connected to the match line and the dummy line in each row; and

    current sources connected to each of the match line and the dummy line in each row.

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