Semiconductor package using terminals formed on a conductive layer of a circuit board

• US 7,053,483 B2
• Filed: 12/21/2004
• Issued: 05/30/2006
• Est. Priority Date: 06/11/1998
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Wallace, Robert F.
• Primary Examiner(s): POTTER, ROY KARL
• Application Number:
  US11/021,169
• Publication Number:
  US 20050099784A1
• Time in Patent Office: 525 Days
• Field of Search: 257/679, 257/687, 257/723
• US Class Current: 257/723
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS
• CPC Class Codes: G11C 29/1201 comprising I/O circuitry
• CPC Class Codes: G11C 29/48 Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
• CPC Class Codes: G11C 5/04 Supports for storage elements , e.g. memory modules; Mounting or fixing of storage elements on such supports
• CPC Class Codes: G11C 5/06 Arrangements for interconnecting storage elements electrically, e.g. by wiring
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/5388 for flat cards, e.g. credit cards cards per se G06K19/00
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/1433 Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H05K 1/0268 for electrical inspection or testing
• CPC Class Codes: H05K 1/117 Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
• CPC Class Codes: H05K 2201/09127 PCB or component having an integral separable or breakable part
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 2201/2018 : Presence of a frame in a printed circuit or printed circuit assembly
• CPC Class Codes: H05K 3/0052 : Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence

Abstract

A small package is provided for a flash EEPROM memory. The small package uses terminals which are part of a bottom conductive layer of a circuit board. In this manner, the final package can be quite thin. The circuit board can be connected to the integrated circuits and passive devices and can be encapsulated in plastic or glued to a plastic cover. In this manner, a thin and relatively inexpensive package can be formed. Additionally, the circuit board can have testing connections which can be removed before forming the final package.

Claims

1. A flash EEPROM package including:

a circuit board;

at least one integrated circuit on the circuit board; and

packaging material surrounding the at least one integrated circuit and part of the circuit board, wherein one side of the circuit board is exposed, the exposed side of the circuit board including a set of terminals connected to the remainder of the circuit board by vias.

2. The package of claim 1, wherein the circuit board material is attached to the packaging material by epoxy.

3. The package of claim 1, wherein on the exposed side of the circuit board only the set of terminals is exposed.

4. The package of claim 1, wherein the circuit elements includes at least two integrated circuits and passive devices.

5. The package of claim 1, wherein the thickness of the package is less than 12 mils.

6. A flash EEPROM package, comprising:

a circuit board;

one or more integrated circuits on a first side of the circuit board, the one or more integrated circuits including at least one flash EEPROM memory array;

terminals on an opposing second side of the circuit board;

packaging material overlying the first side of the circuit board and overlying the one or more integrated circuits, the packaging material conforming to surfaces of the first side of the circuit board and the one or more integrated circuits.

7. The flash EEPROM package of claim 6 wherein the packaging material is formed by injection molding.

8. The flash EEPROM package of claim 6 wherein the packaging material does not overlie any of the second side of the circuit board.

9. The flash EEPROM package of claim 6 wherein a packaging frame extends from the circuit board and encloses the packaging material.

10. The flash EEPROM package of claim 9 wherein the packaging frame includes one or more projections that interlock with the packaging material.

11. The flash EEPROM package of claim 6 further comprising a transfer molded plastic portion encapsulating the one or more integrated circuits, the transfer molded plastic portion covered by packaging material.

12. The flash EEPROM package of claim 11 wherein the packaging material is formed subsequent to formation of the transfer molded plastic portion and the packaging material is formed at a higher temperature than the transfer molded plastic portion.

13. The flash EEPROM package of claim 6 wherein the second side of the circuit board is bounded by a perimeter and the terminals are separated from the perimeter by a distance.

14. A flash EEPROM package comprising:

a circuit board having a first side and an opposing second side;

at least one EEPROM integrated circuit on the first side of the circuit board;

at least one passive device on the first side of the circuit board;

packaging material surrounding the at least one integrated circuit and covering at least a portion of the first side of the circuit board; and

a plurality of terminals on the second side of the circuit board.

15. The flash EEPROM package of claim 14 wherein the second side of the circuit board is uncovered by packaging material.

16. The flash EEPROM package of claim 14 wherein the at least one passive device includes charge pump capacitors.

17. The flash EEPROM package of claim 16 wherein the charge pump capacitors are used to convert a supplied voltage to a voltage that is higher than the supplied voltage.