Integrated access device controller

  • US 7,061,904 B2
  • Filed: 04/09/2001
  • Issued: 06/13/2006
  • Est. Priority Date: 09/13/1999
  • Status: Active Grant
First Claim
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1. A processor for use in a Voice over Internet Protocol (VoIP) telephone, comprising:

  • a bus;

    a processor core coupled to the bus;

    a packet handler coupled to the bus, the packet handler including plurality of first ports for interfacing to one or more workstations;

    a voice handler coupled to the bus, the voice handler including at least one second port for interfacing to a telephone;

    a cell/frame handler coupled to the bus, the cell frame handler adapted to couple to one or more packet networks; and

    a peripheral control processor coupled to the bus for handling interrupts and direct memory access (DMA) requests;

    wherein the peripheral control processor is a programmable, interrupt-driven microcontroller for data transfer and peripheral control, and includes instructions for DMA and bit handling.

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