High voltage laterally double-diffused metal oxide semiconductor

• US 7,109,562 B2
• Filed: 02/07/2005
• Issued: 09/19/2006
• Est. Priority Date: 02/07/2005
• Status: Expired due to Fees

• Current Assignee: Leadtrend Technology Corporation
• Original Assignee: Leadtrend Technology Corporation
• Inventors: Lee, Chi-Hsiang
• Primary Examiner(s): Parker, Kenneth
• Assistant Examiner(s): BUDD, PAUL A
• Application Number:
  US11/050,742
• Publication Number:
  US 20060175658A1
• Time in Patent Office: 589 Days
• Field of Search: 257/340, 257/341, 257/335, 257/336, 257/339, 257/487, 257/488, 257/492, 257/342
• US Class Current: 257/488
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/1045 the doping structure being parallel to the channel length, e.g. DMOS like
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/41725 Source or drain electrodes for field effect devices with monocrystalline semiconductor on source/drain region H01L29/0843
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Abstract

A high voltage laterally double-diffused metal oxide semiconductor (LDMOS) stricture is characterized as follows: the second source electrode metal layer connected to the first source electrode metal layer protrudes out of a certain length relative to the first source electrode metal layer of the source electrode region connected thereto. The second drain electrode metal layer connected to the first drain electrode metal layer protrudes out of a certain length relative to the first drain electrode metal layer of the drain electrode region. The protruded length overlaps more portions of the drift layer than the first source electrode metal layer and the first drain electrode metal layer disposed below, to reduce the electric field concentration of the gate electrode interface or the interface between the N+ type drain electrode layer and the N-type extended drift layer.

Claims

1. A high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure, comprising:

a semiconductor layer having a first conductive type;

a drift layer having a second conductive type and formed in the semiconductor layer, the drift layer extends downward a distance from the surface of the semiconductor layer;

a source electrode region having the second conductive type and formed in the semiconductor layer, including a first region extending downward from the surface of the semiconductor layer, and a second region enclosing the first region, wherein the doping concentration of the first region is greater than that of the second region;

a channel region, disposed between the source electrode region and a first edge of the drift layer;

a drain electrode region of the second conductive type and formed in the semiconductor layer, and adjacent to a second edge of the drift layer;

a first insulation layer formed on the semiconductor layer;

a first gate electrode formed on the first insulation layer;

a second gate electrode formed on the first insulation layer and separated from the first gate electrode;

a second insulation layer and a third insulation layer formed on the first gate electrode and the second gate electrode and overlapping each other;

a first source electrode metal layer, connected to the source electrode region and located over the first gate electrode, which is disposed between the second insulation layer and the third insulation layer, and another second source electrode metal layer is connected to the first source electrode metal layer extending on the third insulation layer, the second source electrode metal layer protrudes out a certain length relative to the first source electrode metal layer and overlaps a portion of the drift layer wherein, longitudinally, the length of the second source electrode metal layer overlaps a part of the drift layer, the overlap of the second source electrode metal layer being longer than an overlap of the first source electrode metal layer; and

a first drain electrode metal layer, connected to the drain electrode region and located over the second gate electrode, which is disposed between the second insulation layer and the third insulation layer, and another second drain electrode metal layer is connected to the first drain electrode metal layer extending on the third insulation layer, the second drain electrode metal layer protrudes out a certain length relative to the first drain electrode metal layer and overlaps a portion of the drift layer, wherein, longitudinally, the length of the second drain electrode metal layer overlaps a part of the drift layer, the overlap of the second drain electrode metal layer being longer than an overlap of the first drain electrode metal layer.

2. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, wherein the drain electrode region includes a third region extending downward from the surface of the semiconductor layer, and a fourth region enclosing the third region, wherein the doping concentration of the third region is greater an that of the fourth region.

3. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, further comprising a region having the first conduction type, extending downward from the surface of the semiconductor layer, being separated from the source electrode region, and being formed on the outer side of the source electrode region.

4. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 3, further comprising a region well having the first conduction type and being formed in the semiconductor layer, extending downward from the surface of the said semiconductor layer, and enclosing the source electrode region and the region having the first conduction type.

5. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 3, further comprising a region well laving the first conduction type and being formed in the semiconductor layer, extending downward from the surface of the semiconductor, and enclosing the region having the first conduction type.

6. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 3, further comprising a region well having the first conduction type and being formed in the semiconductor layer, extending downward from the surface of the semiconductor layer, and enclosing part of the source electrode region and the region having the first conduction type.

7. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 3, further comprising a region well having the first conduction type and being formed in the semiconductor layer, extending downward from the surface of the semiconductor layer, enclosing the region having the first conduction type, and adjoining one side of the source electrode region.

8. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 7, further comprising another region well having the first conduction type and being formed in the semiconductor layer, extending downward from the surface of the semiconductor layer and adjoining the other side of the source electrode region.

9. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, wherein the first conduction type is P type and the second conduction type is N type.

10. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, wherein the semiconductor layer is an epitaxy layer, formed on a substrate having the first conduction type.

11. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, wherein the certain length of the second source electrode metal layer protruding out is between 5% and 20% of the drift layer disposed below.

12. The high voltage laterally double-diffused metal oxide semiconductor (LDMOS) structure of claim 1, wherein the certain length of the second drain electrode metal layer protruding out is between 5% and 20% of the drift layer disposed below.