Method of making a hybrid substrate having a thin silicon carbide membrane layer

• US 7,112,515 B2
• Filed: 01/20/2004
• Issued: 09/26/2006
• Est. Priority Date: 03/01/2001
• Status: Expired due to Fees

• Current Assignee: Astralux, Inc.
• Original Assignee: Astralux, Inc.
• Inventors: Torvik, John Targe
• Primary Examiner(s): Blum, David S.
• Application Number:
  US10/761,490
• Publication Number:
  US 20040171230A1
• Time in Patent Office: 980 Days
• Field of Search: 438/459
• US Class Current: 438/459
• CPC Class Codes: H01L 21/76256 using silicon etch back techniques, e.g. BESOI, ELTRAN

Abstract

A hybrid semiconductor substrate assembly is made by first forming a silicon oxide (SiO_x) layer within a silicon carbide wafer, thus forming a silicon carbide membrane on top of the silicon oxide layer and on a surface of the silicon carbide wafer. Optionally, the silicon oxide layer is then thermally oxidized in the presence of steam or oxygen. A substrate-of-choice is then wafer bonded to the silicon carbide membrane, optionally in the presence of a wetting layer that is located intermediate the substrate-of-choice and the silicone carbide membrane, the wetting layer containing silicon. The silicon oxide layer is then removed by hydrofluoric acid etching, to thereby provide a hybrid semiconductor substrate assembly that includes the substrate-of-choice wafer bonded to the silicon carbide membrane. The hybrid semiconductor substrate assembly is then annealed. The method is repeated a plurality of times, to thereby provide a plurality of hybrid semiconductor substrate assemblies, each assembly including a substrate-of-choice wafer bonded to a silicon carbide membrane. Optionally, an annealing step may be provided after the silicon oxide layer is formed and prior to wafer bonding.

Claims

1. A method of making a hybrid substrate assembly comprising:

implanting a preferential etching layer within a wafer to thereby form a membrane on a surface of the wafer, the preferential etching layer being located interiorly of at least first and second opposing surfaces of the wafer and the membrane being located between the preferential etching layer and the first surface of the wafer, having a different chemical composition than the preferential etching layer, and being more resistant to etching by a selected etchant than the preferential etching layer;

permanently attaching a substrate-of-choice to the membrane; and

etching the preferential etching layer with the selected etchant to separate the membrane from a remainder of the wafer and thereby provide a hybrid substrate assembly that includes the substrate-of-choice permanently attached to the membrane, wherein the wafer is less susceptible to the etchant than the preferential etching layer.

2. The method of claim 1, wherein the preferential etching layer is an oxide layer.

3. The method of claim 1, wherein the wafer is a semiconductor.

4. The method of claim 1, wherein the substrate-of-choice is wafer bonded to the membrane.

5. The method of claim 1, wherein the etching step removes at least substantially the preferential etching layer from the substrate-of-choice and the membrane and including the step of:

aligning a crystalline construction of the substrate-of-choice to a crystalline construction of the membrane before the permanently attaching step.

6. The method of claim 1, further comprising:

providing a wetting layer intermediate the substrate-of-choice and the membrane, the wetting layer having an element that is common to the compositions of the wafer and substrate-of-choice.

7. The method of claim 1, further comprising:

thermally oxidizing the preferential etching layer before the permanently attaching step, wherein a temperature of the oxidizing step is greater than a temperature of the implanting steps, wherein the temperature of the oxidizing step is at least about 600 C, and wherein the thermal oxidation occurs in a molecular oxygen-containing atmosphere.

8. The method of claim 1, wherein the implanting and etching steps respectively comprise an oxygen-implantation step and an acid-etching step.

9. The method of claim 1, further comprising:

providing a wetting layer intermediate the substrate-of-choice and the membrane before the permanently attaching step.

10. The method of claim 1, further comprising:

heating the membrane in a molecular oxygen-containing atmosphere, wherein a temperature of the heating step is greater than a temperature of the implanting step, wherein the heating step occurs after the implanting step and before the etching step, and wherein the temperature of the heating step is at least about 600 C.

11. The method of claim 1, wherein an etchant is used in the etching step and the wafer is resistant to the etchant while the preferential etching layer is susceptible to the etchant and further comprising:

repeating the implanting step, the permanently attaching step, and the etching step a plurality of times relative to the plurality of substrates-of-choice, to thereby provide a plurality of hybrid substrate assemblies that each include a substrate-of-choice wafer bonded to a membrane.

12. The method of claim 1, wherein the wafer is selected from the group consisting essentially of 6H—

SiC, 4H-—

SiC, 3C—

SiC, 15R—

SiC, and combinations thereof.

13. The method of claim 1, wherein the substrate-of-choice is selected from the group consisting essentially of silicon, silicon dioxide, silicon carbide, sapphire, aluminum nitride, diamond, Si₃N₄, and combinations thereof.

14. The method of claim 1, wherein the etchant is hydrofluoric acid.

15. The method of claim 1, wherein the wafer is a semiconductor having a first composition, wherein an oxide layer is implanted within said semiconductor wafer to form the semiconductor membrane on the first surface of the semiconductor wafer, wherein the substrate-of-choice has a second composition that is different than said first composition, wherein the substrate-of-choice is wafer bonded to said semiconductor membrane, wherein the etching step removes at least substantially the oxide layer from the substrate-of-choice and the semiconductor membrane.

16. The method of claim 15, further comprising:

providing a wetting layer intermediate said substrate-of-choice and said semiconductor membrane, said wetting layer having an element that is common to said first composition and said second composition; and

thermally oxidizing said oxide layer prior to said wafer-bonding step, wherein a temperature of the oxidizing step is greater than a temperature of the implanting step and wherein the temperature of the oxidizing step is at least about 600°

C., wherein said step of implanting said oxide layer within said semiconductor wafer and said step of etching said oxide layer respectively comprise an oxygen-implantation step and an acid-etching step.

17. The method of claim 15, wherein the semiconductor wafer is resistant to the etchant while the oxide layer is susceptible to the etchant and further comprising:

repeating said implanting step, said permanently attaching step, and said etching step a plurality of times relative to a plurality of substrates-of-choice, to thereby provide a plurality of hybrid substrate assemblies that each include a substrate-of-choice wafer bonded to a semiconductor membrane.

18. The method of claim 15, wherein the wafer is selected from SiC polytypes such as 6H—

SiC, 4H—

SiC, 3C—

SiC and 15R—

SiC, the preferential etching layer comprises a SiO_x layer within said wafer, wherein the SiO polytype wafer is resistant to the etchant in the etching step while the SiO_x layer is susceptible to the etchant, and further comprising;

thermally oxidizing said SiO_x layer prior to said etching step, wherein a temperature of the oxidizing step is greater than a temperature of the forming step and the temperature of the oxidizing step is at least about 600°

C.; and

providing a wetting layer intermediate said substrate-of-choice and said wafer membrane prior to said wafer-bonding step, wherein said wetting layer contains silicon, wherein the etching step removes at least substantially the SiO_x layer from the substrate-of-choice and the wafer membrane, wherein said substrate-of-choice is selected from a group including Si, SiO₂, polycrystalline SiC, sapphire, polycrystalline AlN, crystalline AlN, diamond and Si₃N₄ and wherein an etchant is used in said etching step comprises etching said SiO_x layer in hydrofluoric acid.

19. The method of claim 15 wherein said wafer membrane is one micrometer thick or less.

20. The method of claim 18, further comprising:

determining a crystalline structure of said SiC wafer and a crystalline structure of said substrate-of-choice; and

physically aligning said crystalline structure of said SiC membrane to said crystalline structure of said SiC wafer prior to said wafer-bonding step.