Non-volatile memory device and data storing method

• US 7,116,578 B2
• Filed: 03/11/2004
• Issued: 10/03/2006
• Est. Priority Date: 09/12/2001
• Status: Expired due to Fees

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi ULSI Systems Company Limited (Hitachi, Ltd.), Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Kozakai, Kenji, Tamura, Takayuki, Kanamori, Motoki, Shikata, Atsushi, Asari, Shinsuke
• Primary Examiner(s): Zarabian, Amir
• Assistant Examiner(s): PHAM, LY D
• Application Number:
  US10/796,995
• Publication Number:
  US 20040174742A1
• Time in Patent Office: 936 Days
• Field of Search: 365/185.08, 365/185.11, 365/185.23, 365/189.04, 365/189.05, 365/189.12, 365/196, 365/230.03, 365/230.06, 365/230.08, 365/236, 365/239, 365/240, 365/220
• US Class Current: 365/185.08
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 2207/229 Timing of a write operation sense amplifier timing G11C7/06, G11C7/08

Abstract

In a card storage device containing a non-volatile memory and a buffer memory, the buffer memory includes a plurality of banks. Data is transferred sequentially from a host CPU to the banks of the buffer memory, data is transferred to the non-volatile memory from a bank that becomes full, a write operation is started when one unit of data to be written into the non-volatile memory at a time has been transferred and, without waiting for the data to be written, the next write data is transferred from the host CPU to a bank from which write data has been transferred.

Claims

1. A nonvolatile storage device comprising:

a controller;

a buffer memory, wherein said buffer memory comprises a plurality of banks;

a nonvolatile memory, wherein an amount of data storable into said nonvolatile memory at one time is equal to an amount of data that can be stored in a plurality of said banks of said buffer memory,

wherein said controller performs control operations to receive data from outside of said nonvolatile storage device via a data terminal, to store received data to said banks of said buffer memory, and to transfer received data from said banks of said buffer memory to said nonvolatile memory,

wherein said controller also detects whether received data has been transferred from each bank of said buffer memory to said nonvolatile memory, performs control operations to select, for storing further received data, one of said banks of said buffer memory that is not storing received data yet to be transferred to said nonvolatile memory, and performs control operations to issue a program command to said nonvolatile memory when said controller controls transfer of the amount of data to said nonvolatile memory, and

wherein said controller further provides a signal, as status information, to the outside of said nonvolatile storage device when said controller detects that all of said banks of said buffer memory are storing received data yet to be transferred to said nonvolatile memory;

a status register including a status flag used for providing a state indication which indicates whether a transfer of data from said buffer memory to said nonvolatile memory has been completed, wherein said status flag is set by said controller, and said controller is capable of outputting said state indication as said status information,

wherein said status flag includes a plurality of bits respectively corresponding to said plurality of banks of said buffer memory, and each of said bits indicates whether transferring of data from the corresponding bank of said buffer memory to said nonvolatile memory has been completed;

a first register containing information which indicates whether each of said banks of said buffer memory is storing received data; and

a second register containing information which indicates whether received data stored in each of said banks of said buffer memory has been transferred to said nonvolatile memory,

wherein said controller judges whether each of said banks of said buffer memory stores received data yet to be transferred to said nonvolatile memory, based on information contained in said first register and information contained in said second register, for setting each of said bits of said status flag.

2. A nonvolatile storage device according to claim 1, further comprising:

a register in which an address range of said nonvolatile memory is set; and

a data storage error detection circuit which detects whether data may be written to said nonvolatile memory, based on the address information that is set in said register and an amount of data that is received from the outside.

3. A nonvolatile storage device according to claim 1,

wherein a total storage size of all banks of said buffer memory equals a size of a unit of data that is written into said nonvolatile memory at a time.