Nitride semiconductor device

• US 7,119,378 B2
• Filed: 11/02/2004
• Issued: 10/10/2006
• Est. Priority Date: 07/07/2000
• Status: Expired due to Term

• Current Assignee: Nichia Corporation
• Original Assignee: Nichia Corporation
• Inventors: Kozaki, Tokuya
• Primary Examiner(s): Vu, David
• Application Number:
  US10/978,732
• Publication Number:
  US 20050098789A1
• Time in Patent Office: 707 Days
• Field of Search: 257 12- 15, 257/17, 257/22, 257/94, 257/96, 257/97, 257/103, 257/E31.033, 257/E29.072, 257/E29.248
• US Class Current: 257/103
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01S 2304/12 Pendeo epitaxial lateral overgrowth [ELOG], e.g. for growing GaN based blue laser diodes
• CPC Class Codes: H01S 5/18308 having a special structure for lateral current or light confinement
• CPC Class Codes: H01S 5/18369 based on dielectric materials
• CPC Class Codes: H01S 5/2009 by using electron barrier layers
• CPC Class Codes: H01S 5/22 having a ridge or stripe structure
• CPC Class Codes: H01S 5/305 characterised by the doping materials used in the laser structure
• CPC Class Codes: H01S 5/3054 p-doping
• CPC Class Codes: H01S 5/3086 doping of the active layer
• CPC Class Codes: H01S 5/3407 characterised by special barrier layers
• CPC Class Codes: H01S 5/3415 containing details related to carrier capture times into wells or barriers
• CPC Class Codes: H01S 5/343 in AIIIBV compounds, e.g. AlGaAs-laser , InP-based laser
• CPC Class Codes: H01S 5/34333 with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

A nitride semiconductor device includes an n-type semiconductor layer, p-type semiconductor layer and an active layer of a quantum well structure that is sandwiched between said p-type and n-type nitride semiconductor layer, wherein the active layer has a first barrier layer, a second barrier layer and a third barrier layer. The first barrier layer is nearest to the p-type nitride semiconductor layer among the first, second and third barrier layers. The second barrier layer is nearest to the n-type nitride semiconductor layer among the first, second and third barrier layers. The third barrier layer is between the first and second barrier layers, and includes an upper barrier layer that contacts with a p-side surface of the well layer and a lower barrier layer that contacts with an n-side surface of said well layer. The upper and lower barrier layers having different composition or impurity concentrations.

Claims

1. A nitride semiconductor device comprising:

a n-type semiconductor layer,

p-type semiconductor layer and

an active layer of a quantum well structure that is sandwiched between said p-type and n-type nitride semiconductor layer,

wherein said active layer includes a first barrier layer, a second barrier layer and a third barrier layer;

said first barrier layer being the nearest to said p-type nitride semiconductor layer among the first, second and third barrier layers;

said second barrier layer being the nearest to said n-type nitride semiconductor layer among the first, second and third barrier layers;

said third barrier layer being between said first and second barrier layers,

and wherein said third barrier layer includes at least an upper barrier layer that is in contact with a p-side surface of said well layer and a lower barrier layer that is in contact with an n-side surface of said well layer;

said upper and lower barrier layers being different in a composition or impurity concentration with each other.

2. The nitride semiconductor device according to claim 1, wherein said lower barrier layer includes GaN or an In-containing nitride semiconductor of which in content is lower than that of said well layer.

3. The nitride semiconductor device according to claim 2, wherein said n-type semiconductor layer, said active layer and said p-type semiconductor layer are sequentially layered on a substrate.

4. The nitride semiconductor layer according to claim 1, wherein said first barrier layer is arranged in the outermost position within said active layer.

5. The nitride semiconductor layer according to claim 1, wherein said second barrier layer includes an n-type impurity.

6. The nitride semiconductor layer according to claim 5, wherein the concentration of a n-type impurity in said well layer is not greater than that of said barrier layers including the n-type impurity.

7. The nitride semiconductor layer according to claim 1, wherein the concentration of a n-type impurity in said first barrier layer is not more than 5×

10¹⁶ cm<sup>−

3</sup>.

8. The nitride semiconductor layer according to claim 1, wherein said first barrier layer includes a p-type impurity.

9. The nitride semiconductor layer according to claim 1, wherein at least one of said well layers has the thickness of not less than 20 Å

and not more than 200 Å

.

10. The nitride semiconductor layer according to claim 1, wherein said p-type nitride semiconductor layer has a first p-type nitride semiconductor layer adjoining said active layer, and said first p-type nitride semiconductor layer is made of a nitride semiconductor that includes Al.

11. The nitride semiconductor layer according to claim 10, wherein said first barrier layer is arranged to contact with said first p-type nitride semiconductor layer.

12. The nitride semiconductor layer according to claim 11, wherein said first p-type nitride semiconductor layer is doped with a p-type impurity in higher concentration than said first barrier layer.

13. A nitride semiconductor device comprising:

a n-type semiconductor layer,

p-type semiconductor layer and

an active layer of a quantum well structure that is sandwiched between said p-type and n-type nitride semiconductor layer,

wherein said active layer has L (L≧

2) barrier layers so that the barrier layer arranged in a position nearest to said n-type nitride semiconductor layer is denoted as barrier layer B_i and the i-th barrier layer (i=1, 2, 3, . . . L) counted from the barrier layer B_i toward said p-type nitride semiconductor layer is denoted as barrier layer B_i,

and wherein at least one of said barrier layers Bi(1≦

i≦

L) comprises at least an upper barrier layer that is in contact with a p-side surface of said well layer and a lower barrier layer that is in contact with an n-side surface of said well layer;

said upper and lower barrier layers being different in a composition or impurity concentration with each other.

14. The nitride semiconductor device according to claim 13, wherein said lower barrier layer includes GaN or an In-containing nitride semiconductor of which In content is lower than that of said well layer.

15. The nitride semiconductor device according to claim 14, wherein said n-type semiconductor layer, said active layer and said p-type semiconductor layer are sequentially layered on a substrate.

16. The nitride semiconductor layer according to claim 13, wherein said barrier layer B_L is arranged in the outermost position within said active layer.

17. The nitride semiconductor layer according to claim 13, wherein the barrier layers Bi from i=1 to i=n (1<

n<

L) include an n-type impurity.

18. The nitride semiconductor layer according to claim 17, wherein the concentration of an n-type impurity in said well layer is not greater than that of said barrier layers including the n-type impurity.

19. The nitride semiconductor layer according to claim 13, wherein the concentration of a n-type impurity in said barrier layer B_L is not more than 5×

10¹⁶ cm<sup>−

3</sup>.

20. The nitride semiconductor layer according to claim 19, wherein said barrier layer B_L includes a p-type impurity.

21. The nitride semiconductor layer according to claim 20, wherein at least one of said well layers has the thickness of not less than 20 Å

and not more than 200 Å

.

22. The nitride semiconductor layer according to claim 13, wherein said p-type nitride semiconductor layer has a first p-type nitride semiconductor layer adjoining said active layer, and said first p-type nitride semiconductor layer is made of a nitride semiconductor that includes Al.

23. The nitride semiconductor layer according to claim 22, wherein said first barrier layer is arranged to contact with said first p-type nitride semiconductor layer.

24. The nitride semiconductor layer according to claim 23, wherein said first p-type nitride semiconductor layer is doped with a p-type impurity in higher concentration than said barrier layer B_L.

25. A nitride semiconductor device comprising:

a n-type semiconductor layer,

p-type semiconductor layer and

an active layer of a quantum well structure that is sandwiched between said p-type and n-type nitride semiconductor layer,

wherein said active layer includes a first barrier layer, a second barrier layer and a third barrier layer;

said first barrier layer being the nearest to said p-type nitride semiconductor layer among barrier layers;

said second barrier layer being the nearest to said n-type nitride semiconductor layer among barrier layers;

said third barrier layer being between said first and second barrier layers,

and wherein said third barrier layer includes at least an upper barrier layer that is in contact with a p-side surface of said well layer and a lower barrier layer that is in contact with a n-side surface of said well layer;

said upper and lower barrier layers being different in a composition or impurity concentration with each other.

26. The nitride semiconductor device according to claim 25, wherein said lower barrier layer includes GaN or an In-containing nitride semiconductor of which In content is lower than that of said well layer.

27. The nitride semiconductor device according to claim 26, wherein said n-type semiconductor layer, said active layer and said p-type semiconductor layer are sequentially layered on a substrate.

28. The nitride semiconductor layer according to claim 26, wherein said first barrier layer is arranged in the outermost position within said active layer.

29. The nitride semiconductor layer according to claim 25, wherein said second barrier layer includes an n-type impurity.

30. The nitride semiconductor layer according to claim 29, wherein the concentration of a n-type impurity in said well layer is not greater than that of said barrier layers including the n-type impurity.

31. The nitride semiconductor layer according to claim 25, wherein the concentration of a n-type impurity in said first barrier layer is not more than 5×

10¹⁶ cm<sup>−

3</sup>.

32. The nitride semiconductor layer according to claim 25, wherein said first barrier layer includes a p-type impurity.

33. The nitride semiconductor layer according to claim 25, wherein at least one of said well layers has the thickness of not less than 20 Å

and not more than 200 Å

.

34. The nitride semiconductor layer according to claim 25, wherein said p-type nitride semiconductor layer has a first p-type nitride semiconductor layer adjoining said active layer, and said first p-type nitride semiconductor layer is made of a nitride semiconductor that includes Al.

35. The nitride semiconductor layer according to claim 34, wherein said first barrier layer is arranged to contact with said first p-type nitride semiconductor layer.

36. The nitride semiconductor layer according to claim 35, wherein said first p-type nitride semiconductor layer is doped with a p-type impurity in higher concentration than said first barrier layer.