Storage system and a method of speeding up writing data into the storage system

• US 7,124,244 B2
• Filed: 09/11/2003
• Issued: 10/17/2006
• Est. Priority Date: 07/24/2003
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Hitachi, Ltd.
• Inventors: Shimada, Kentaro
• Primary Examiner(s): Kim, Matthew
• Assistant Examiner(s): Dare, Ryan A.
• Application Number:
  US10/659,374
• Publication Number:
  US 20050021907A1
• Time in Patent Office: 1,132 Days
• Field of Search: 711/113, 711/114, 711/119, 711/120, 711/148, 711/162, 711/161, 714/5, 714/6, 714/14
• US Class Current: 711/113
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 11/2089 Redundant storage control functionality
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/286 Mirrored cache memory
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0656 Data buffering arrangements

Abstract

A storage system having disk drives, a first and a second cache memory for temporarily storing data sent from a host system so as to be written in the disk drives and a duplicate of the data, a first FIFO buffer for temporality storing the duplicate data in order to transfer the duplicate data from the first cache memory to the second cache memory, and a second FIFO buffer for temporality storing the duplicate data in order to transfer the duplicate data from the second cache memory to the first cache memory. In the case where the data sent from the host system so as to be written in the disk drives are temporarily stored in the first cache memory and the duplicate of the data is stored in the second cache memory, completions of the data writing are reported to the host system at the time point when the data and the duplicate data are stored in the fist cache memory and the second cache memory. After the report of completions of data writing to the host system, the duplicate data stored in the FIFO buffer are stored in the cache memory.

Claims

1. A storage system comprising:

a storage device;

a first controller and a second controller both connected to the storage device and a host system,

a first power unit; and

a second power unit,

wherein the first controller has a first memory, said first memory being a cache memory and a second memory,

wherein, the second controller has a third memory, said third memory being a cache memory that receives a copy of the data received by said first memory,

wherein, in the case where the first controller receives data from the host system, the first controller stores the data in the first and the second memories and sends a response to the host system, and then the first controller transfers the data stored in the second memory to the third memory,

wherein the first memory of the first controller receives power feeding from the first power unit,

wherein the second memory of the first controller and the third memory of the second controller receive power feeding from the second power unit.

2. A storage system according to claim 1, wherein the second memory is a FIFO buffer.

3. A storage system according to claim 2, wherein the storage device is a plurality of storage devices.

4. A storage system according to claim 3, wherein the second memory has a unit for indicating presence or absence of data stored in the second memory.

5. A storage system comprising:

a storage device;

a first controller and a second controller both connected to the storage device and a host system,

a first power unit,

a second power unit; and

a third power unit,

wherein the first controller has a first memory, said first memory being a cache memory and a second memory,

wherein the second controller has a third memory, said third memory being a cache memory that receives a copy of the data received by said first memory,

wherein, in the case where the first controller receives data from the host system, the first controller stores the data in the first and the second memories and sends a response to the host system, and then the first controller transfers the data stored in the second memory to the third memory,

wherein the first memory of the first controller receives power feeding from the first power unit,

wherein the second memory of the first controller receives power feeding from the second power unit,

wherein the third memory of the second controller receives power feeding from the third power unit.

6. A storage system comprising:

a storage device;

a first controller and a second controller both connected to the storage device and a host system; and

a power unit,

wherein the first controller has a first memory, said first memory being a cache memory and a second memory,

wherein the second controller has a third memory, said third memory being a cache memory that receives a copy of the data received by said first memory,

wherein, in the case where the first controller receives data from the host system, the first controller stores the data in the first and the second memories and sends a response to the host system, and then the first controller transfers the data stored in the second memory to the third memory,

wherein the first memory of the first controller and the second memory of the first controller receive power feeding from the power unit,

wherein the second memory of the first controller includes a battery and charges the battery by the use of the power unit.

7. A storage system according to claim 6,

wherein, in the case where a failure occurs in the power unit, the second memory switches the power feeding from the power unit to power feeding from the battery.

8. A storage system comprising:

a host interface unit connected to a host system;

a switching unit connected to the host interface unit;

a first and a second controller connected to the switching unit; and

a storage device connected to the first and the second controller,

wherein the first controller has a first memory, said first memory being a cache memory, and a second memory,

wherein the second controller has a third memory, said third memory being a cache memory that receives a copy of data received by said first memory,

wherein, in the case where the first controller receives data from the host system, the first controller stores the data in the first memory and the second memory and sends a response to the host system, and then the first controller transfers the data stored in the second memory to the third memory.

9. A storage system comprising:

a disk drive;

a first cache memory for temporarily storing data sent from a host system so as to be written on the disk drive;

a second cache memory for storing a duplicate of the data to be written on the disk drive;

a FIFO buffer for temporarily storing the duplicate of the data sent from the host system to transfer the duplicate of the data to the second cache memory,

a first power unit connected to the first cache memory; and

a second power unit connected to the second cache memory, the second power unit being independent from the first power unit,

wherein, at the time when the data sent from the host system are stored in the first cache memory and the duplicate of the data sent from the host system are stored in the FIFO buffer, the host system is informed about the completions of data writing,

wherein the FIFO buffer is connected to the second power unit.

10. A storage system according to claim 9, further comprising a data remaining indicator for indicating whether or not all the duplicate of the data sent from the host system has been transferred from the FIFO buffer to the second cache memory.

11. A storage system comprising:

a disk drive;

a first cache memory for temporarily storing data sent from a host system so as to be written on the disk drive;

a second cache memory for storing a duplicate of the data to be written on the disk drive;

a FIFO buffer for temporarily storing the duplicate of the data sent from the host system to transfer the duplicate of the data to the second cache memory,

a first power unit connected to the first cache memory;

a second power unit connected to the second cache memory, the second power unit being independent from the first power unit; and

a third power unit connected to the FIFO buffer, the third power unit being independent from the first power unit,

wherein, at the time when the data sent from the host system are stored in the first cache memory and the duplicate of the data sent from the host system are stored in the FIFO buffer, the host system is informed about the completions of data writing.

12. A storage system comprising:

a disk drive;

a first cache memory for temporarily storing data sent from a host system so as to be written on the disk drive;

a second cache memory for storing a duplicate of the data to be written on the disk drive;

a FIFO buffer for temporarily storing the duplicate of the data sent from the host system to transfer the duplicate of the data to the second cache memory,

a first power unit connected to the first cache memory; and

a second power unit connected to the second cache memory, the second power unit being independent from the first power unit,

wherein, at the time when the data sent from the host system are stored in the first cache memory and the duplicate of the data sent from the host system are stored in the FIFO buffer, the host system is informed about the completions of data writing,

wherein the FIFO buffer is connected to the first power unit and provided with a battery for feeding power to the FIFO buffer in place of the first power unit in case of failure in the first power unit.