Field effect transistor switch circuit

• US 7,138,846 B2
• Filed: 12/19/2002
• Issued: 11/21/2006
• Est. Priority Date: 12/20/2001
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Suwa, Atsushi, Komatsu, Tadashi, Nakatsuka, Tadayoshi, Tara, Katsushi
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): Nguyen, Hiep
• Application Number:
  US10/322,589
• Publication Number:
  US 20030116780A1
• Time in Patent Office: 1,433 Days
• Field of Search: 327/308, 327/389, 327/391, 333/101, 333/81.R, 333/103
• US Class Current: 327/308
• CPC Class Codes: H01L 27/0605 integrated circuits made of compound material, e.g. AIIIBV
• CPC Class Codes: H01L 29/812 with a Schottky gate H01L29/7725, H01L29/775, H01L29/778, H01L29/806 take precedence; with Schottky contact on top of heterojunction gate H01L29/802
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

A field effect transistor switch circuit may include: (1) first, second, and third switch terminals; (2) a first field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the second switch terminal; and (3) a second field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the third switch terminal. A first resistor is connected between a control electrode and any one of the pair of the main electrodes of the first field effect transistor, and a second resistor is connected between a control electrode and any one of the pair of the main electrodes of the second field effect transistor.

Claims

1. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a first control line for supplying a first control voltage to a control electrode of said first field effect transistor stage; and

a second control line for supplying the complimentary voltage of said first control voltage to a control electrode of said second field effect transistor stage, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of said field effect transistors has a first resistor connected between the field effect transistor'"'"'s gate and source electrodes, and

the gate electrode of each field effect transistor is connected to the corresponding control electrode via a second resistor.

2. The field effect transistor switch circuit of claim 1, wherein the third switch terminal is a ground terminal.

3. The field effect transistor switch circuit of claim 1, further comprising:

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the third and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors of the third and fourth field effect transistor stages has a first resistor connected between the field effect transistor'"'"'s gate and source electrodes, and

the gate electrode of each of the field effect transistors of the third and fourth field effect transistor stages is connected to a control electrode, corresponding to the respective field effect transistor stage, via a second resistor.

4. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal; and

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source electrodes, and

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor.

5. The field effect transistor switch circuit of claim 4, wherein the third switch terminal is a ground terminal.

6. The field effect transistor switch circuit of claim 4, further comprising:

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the third and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors of the third and fourth field effect transistor stages has a resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source electrodes, and

each of said correction capacitances of the third and fourth field effect transistor stages corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor.

7. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a first control line for supplying a first control voltage to a control electrode of said first field effect transistor stage; and

a second control line for supplying the complimentary voltage of said first control voltage to a control electrode of said second field effect transistor stage, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a first resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor, and

the gate electrode of each field effect transistor is connected to the corresponding control electrode via a second resistor.

8. The field effect transistor switch circuit of claim 7, wherein the third switch terminal is a ground terminal.

9. The field effect transistor switch circuit of claim 7, further comprising:

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the third and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors of the third and fourth field effect transistor stages has a first resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source electrodes,

each of said correction capacitances of the third and fourth field effect transistor stages corrects an unbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor, and

the gate electrode of each field effect transistor of the third and fourth field effect transistor stages is connected to a corresponding control electrode via a second resistor.

10. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a first control line for supplying a first control voltage to a control electrode of said first field effect transistor stage; and

a second control line for supplying the complimentary voltage of said first control voltage to a control electrode of said second field effect transistor stage, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a correction capacitance connected between the field effect transistor'"'"'s gate and source electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor, and

the gate electrode of each field effect transistor is connected to the corresponding control electrode via a resistor.

11. The field effect transistor switch circuit of claim 10, wherein the third switch terminal is a ground terminal.

12. The field effect transistor switch circuit of claim 10, further comprising:

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the third and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors of the third and fourth field effect transistor stages has a correction capacitance connected between the field effect transistor'"'"'s gate and source electrodes, and

each of said correction capacitances of the third and fourth field effect transistor stages corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source electrodes during the OFF state of the field effect transistor.

13. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal, wherein;

each of the first and second field effect transistor stages has a resistor and a correction capacitance, which are connected in parallel, connected between a control electrode and a main electrode, which is connected to one of the first, second, and third switch terminals,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor stage'"'"'s control and main electrodes during the OFF state of the field effect transistor stage, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor stage, and larger than the depletion layer capacitance during the OFF-state.

14. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source/drain electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source/drain electrodes during the OFF state of the field effect transistor, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor, and larger than the depletion layer capacitance during the OFF-state.

15. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal, wherein;

each of the first and second field effect transistor stages has a resistor and a correction capacitance, which are connected in parallel, connected between a control electrode and a main electrode, which is connected to one of the first, second, and third switch terminals,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor stage'"'"'s control and main electrodes during the OFF state of the field effect transistor stage,

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor stage, and larger than the depletion layer capacitance during the OFF-state, and

the third switch terminal is a ground terminal.

16. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal, wherein;

each of said first and second field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source/drain electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source/drain electrodes during the OFF state of the field effect transistor,

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor, and larger than the depletion layer capacitance during the OFF-state, and

the third switch terminal is a ground terminal.

17. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal;

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the first, second, third, and fourth field effect transistor stages has a resistor and a correction capacitance, which are connected in parallel, connected between a control electrode and a main electrode, which is connected to one of the first, second, third, and fourth switch terminals,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor stage'"'"'s control and main electrodes during the OFF state of the field effect transistor stage, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor stage, and larger than the depletion layer capacitance during the OFF-state.

18. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of said first, second, third, and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a resistor and a correction capacitance, which are connected in parallel, connected between the field effect transistor'"'"'s gate and source/drain electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source/drain electrodes during the OFF state of the field effect transistor, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor, and larger than the depletion layer capacitance during the OFF-state.

19. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal;

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of the first, second, third, and fourth field effect transistor stages has a correction capacitance connected between a control electrode and a main electrode, which is connected to one of the first, second, third, and fourth switch terminals,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor stage'"'"'s control and main electrodes during the OFF state of the field effect transistor stage, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor stage, and larger than the depletion layer capacitance during the OFF-state.

20. A field effect transistor switch circuit comprising:

a first field effect transistor stage that is connected in series between a first switch terminal and a second switch terminal;

a second field effect transistor stage that is connected in series between the first switch terminal and a third switch terminal;

a third field effect transistor stage that is connected in series between the third switch terminal and a fourth switch terminal; and

a fourth field effect transistor stage that is connected in series between the fourth switch terminal and the second switch terminal, wherein;

each of said first, second, third, and fourth field effect transistor stages comprises a series circuit having a plurality of field effect transistors,

each of the field effect transistors has a correction capacitance connected between the field effect transistor'"'"'s gate and source/drain electrodes,

each of said correction capacitances corrects an imbalance of an equivalent capacitance between the respective field effect transistor'"'"'s gate and source/drain electrodes during the OFF state of the field effect transistor, and

the capacitance of each of the correction capacitances is smaller than the depletion layer capacitance, during the ON-state, of the corresponding field effect transistor, and larger than the depletion layer capacitance during the OFF-state.