Physical layer apparatus compliant to serial and parallel ATA interfaces

• US 7,159,055 B2
• Filed: 05/06/2003
• Issued: 01/02/2007
• Est. Priority Date: 08/29/2002
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Wang, Tse-Hsien, Chiang, Chinyi
• Primary Examiner(s): Fleming; Fritz
• Assistant Examiner(s): KIM, HAROLD J
• Application Number:
  US10/429,844
• Publication Number:
  US 20040044802A1
• Time in Patent Office: 1,337 Days
• Field of Search: 710/74, 710/71, 710/72, 710/62, 710/2
• US Class Current: 710/74
• CPC Class Codes: G06F 13/387 for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence

Abstract

A physical layer apparatus compliant for both serial and parallel ATA interfaces is devised. The physical layer apparatus includes a serial ATA physical layer circuit, a channel selection unit and a channel selection controller. The channel selection unit is connected to a media access controller of a host through a first IDE bus. The channel selection unit is further selectively connected to a serial ATA device through the serial ATA physical circuit or connected to a parallel ATA device through second IDE bus. Therefore, the media access controller of the host can selectively access the serial ATA device and the parallel ATA device through the channel selection unit under the control of the channel selection controller.

Claims

1. A physical layer apparatus for ATA interface, comprising;

a serial ATA physical layer circuit, at least one serial ATA device being connected to said serial ATA physical layer circuit;

a channel selection unit simultaneously connected to a media access controller of a host through a first IDE bus, said at least one serial ATA device through said serial ATA physical layer circuit, and at least one parallel ATA device through a second IDE bus, said channel selection unit selectively switching connection of said first IDE bus between said serial ATA physical layer circuit and said second IDE bus, wherein said serial ATA physical layer circuit is dedicated exclusively to said at least one serial ATA device, and wherein said second IDE bus is dedicated exclusively to said at least one parallel ATA device; and

a channel selection controller connected to said channel selection unit to control said channel selection unit for selective switching between said serial ATA physical layer circuit and said second IDE bus for corresponding communication between the media access controller and either said at least one serial ATA device or said at least one parallel ATA device.

2. The physical layer apparatus for ATA interface as in claim 1, further comprising a detection circuit connected to said channel selection controller, wherein said detection circuit detects a connection state of said at least one serial ATA device with respect to said serial ATA physical layer circuit and drives said channel selection controller to generate a control signal indicative of said connection state of said at least one serial ATA device, said channel selection unit having an accessing channel controlled by said control signal to selectively switch the media access controller between said serial ATA physical layer circuit and said second IDE bus through said channel selection unit and said accessing channel.

3. The physical layer apparatus for ATA interface as in claim 2, wherein said accessing channel of said channel selection unit is controlled by a software.

4. The physical layer apparatus for ATA interface as in claim 2, further comprising a manual switch to set an automatic detection mode for channel selection, wherein said accessing channel is switched between said serial ATA physical layer circuit and said second IDE bus.

5. The physical layer apparatus for ATA interface as in claim 1, wherein said channel selection unit comprises a selection switch.

6. The physical layer apparatus for ATA interface as in claim 5, wherein said selection switch is a multiplexer.

7. The physical layer apparatus for ATA interface as in claim 1, further comprising a manual switch connected to said channel selection controller to change a setting of said channel selection controller.

8. The physical layer apparatus for ATA interface as in claim 1, wherein said physical layer apparatus is integrated into a discrete physical layer chip.

9. The physical layer apparatus for ATA interface as in claim 8, wherein said discrete physical layer chip is directly mounted on a motherboard.

10. The physical layer apparatus for ATA interface as in claim 8, wherein said discrete physical layer chip is integrated into a controller card.