High frequency switching circuit and semiconductor device

• US 7,173,471 B2
• Filed: 06/10/2004
• Issued: 02/06/2007
• Est. Priority Date: 06/13/2003
• Status: Expired due to Fees

• Current Assignee: Collabo Innovations, Inc. (Wi-LAN Inc.)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Nakatsuka, Tadayoshi, Suwa, Atsushi, Tara, Katsushi
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): Nguyen, Hiep
• Application Number:
  US10/864,351
• Publication Number:
  US 20050017786A1
• Time in Patent Office: 971 Days
• Field of Search: None
• US Class Current: 327/308
• CPC Class Codes: H03K 17/04123 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

Four switching circuit sections consisting of four FETs connected in series are provided between a plurality of input/output terminals which output and input a high frequency signal. Gate control voltages are individually applied to gate terminals of four FETs, respectively, so that an on-state and an off-state are achieved. Further drain control voltages are individually applied to drain terminals or source terminals of the FET in each switching circuit section, and a voltage according to an electric power value of the high frequency signal supplied to each of switching circuit sections is supplied as the gate control voltage and the drain control voltage.

Claims

1. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

the drain control voltage supplied to said plurality of switching circuit sections is a voltage given by a logical-OR of the gate control voltage supplied to said plurality of switching circuit sections.

2. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

the drain control voltage supplied to said plurality of switching circuit sections is a voltage given by a logical-OR of the gate control voltage supplied to said plurality of switching circuit sections and said reference voltage supplied from an external source.

3. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage,

said plurality of switching circuit sections are circuits for switching transmission and reception of the high frequency signal, and

the drain control voltage is supplied to said plurality of switching circuit sections before the transmission and reception of said high frequency signal are performed and the voltage supply is terminated after the transmission and reception are completed.

4. A high frequency switching circuit, comprising:

a plurality of transmission terminals to which a high frequency signal is supplied;

a plurality of reception terminals from which the high frequency signal is supplied;

one or more input/output terminals which input or output the high frequency signal; and

a plurality of switching circuit sections arranged between said plurality of transmission terminals and said one or more input/output terminals, and between said plurality of reception terminals and said one or more input/output terminals, wherein;

each of said plurality of switching circuit sections is comprised of a circuit having a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

in said plurality of switching circuit sections, a voltage given by a logical-OR of gate control voltages of said plurality of switching circuit sections connected with said plurality of transmission terminals except a selected transmission terminal is further applied to a drain terminal or a source terminal of a selected switching circuit section between said selected transmission terminal to which a transmission signal is supplied among said plurality of transmission terminals and an input/output terminal as a drain control voltage, and

a voltage given by a logical-OR of the gate control voltages of said plurality of switching circuit sections connected to said plurality of transmission terminals is applied to drain terminals or source terminals of field effect transistors of said plurality of switching circuit sections connected to said plurality of reception terminals as the drain control voltage.

7. A high frequency switching circuit according to claim 4, wherein a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode.

10. A high frequency switching circuit according to claim 4, wherein the plurality of transmission terminals and the plurality of reception terminals are comprised of the switching circuit sections used for shunt, a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode, and a control voltage of said switching circuit section for shunt is employed as a voltage with opposite phase to the gate control voltage of said plurality of field effect transistors.

13. A high frequency switching circuit according to claim 4, wherein a circuit which generates the drain control voltage comprises an OR circuit having a plurality of diodes.

16. A semiconductor device which integrates a high frequency switching circuit according to claim 4 on a semiconductor substrate.

5. A high frequency switching circuit, comprising:

a plurality of transmission terminals to which a high frequency signal is supplied;

a plurality of reception terminals from which the high frequency signal is supplied;

one or more input/output terminals which input or output the high frequency signal; and

a plurality of switching circuit sections arranged between said plurality of transmission terminals and said one or more input/output terminals, and between said plurality of reception terminals and said one or more input/output terminals, wherein;

each of said plurality of switching circuit sections is comprised of a circuit having a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

in said plurality of switching circuit sections, a voltage given by a logical-OR of a reference voltage and gate control voltages of the plurality of switching circuit sections connected with said plurality of transmission terminals except a selected transmission terminal is further applied to a drain terminal or a source terminal of a selected switching circuit section between said selected transmission terminal to which a transmission signal is supplied among said plurality of transmission terminals and an input/output terminal as a drain control voltage, and

a voltage given by a logical-OR of the gate control voltages of the plurality of switching circuit sections connected to said plurality of transmission terminals, and said reference voltage is applied to drain terminals or source terminals of field effect transistors of said plurality of switching circuit sections connected to said plurality of reception terminals as the drain control voltage.

8. A high frequency switching circuit according to claim 5, wherein a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode.

11. A high frequency switching circuit according to claim 5, wherein the plurality of transmission terminals and the plurality of reception terminals are comprised of the switching circuit sections used for shunt, a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode, and a control voltage of said switching circuit section for shunt is employed as a voltage with opposite phase to the gate control voltage of said plurality of field effect transistors.

14. A high frequency switching circuit according to claim 5, wherein a circuit which generates the drain control voltage comprises an OR circuit having a plurality of diodes.

17. A semiconductor device which integrates a high frequency switching circuit according to claim 5 on a semiconductor substrate.

6. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode.

9. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

at least one of the plurality of input/output terminals is comprised of a switching circuit section for shunt, a gate control voltage of said plurality of field effect transistors is given with 2 states, wherein, when a voltage with one state is given as the gate control voltage, a voltage with another state is applied to a drain or source terminal of a plurality of the field effect transistors comprising the switching circuit section to which the drain control voltage is not supplied among said plurality of switching circuit sections via a diode, and a control voltage of said switching circuit section for shunt is employed as a voltage with opposite phase to the gate control voltage of said plurality of field effect transistors.

12. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

a circuit which generates the drain control voltage comprises an OR circuit having a plurality of diodes.

15. A high frequency switching circuit, comprising:

a plurality of switching circuit sections arranged between a plurality of input/output terminals which output and input a high frequency signal, wherein;

each of said plurality of switching circuit sections is comprised of a circuit consisting of a plurality of field effect transistors connected in series, and a gate control voltage is applied to gate terminals of said plurality of field effect transistors, so that an on-state and an off-state are achieved,

a drain control voltage is further applied to drain terminals or source terminals of said plurality of field effect transistors of each of said plurality of switching circuit sections,

a voltage according to an electric power value of the high frequency signal supplied to said plurality of switching circuit sections is supplied as said gate control voltage and said drain control voltage, and

the high frequency switching circuit is integrated by a semiconductor device on a semiconductor substrate.