Apparatus and methods for the inspection of objects

• US 7,181,059 B2
• Filed: 11/12/2003
• Issued: 02/20/2007
• Est. Priority Date: 08/05/1999
• Status: Expired due to Fees

• Current Assignee: Orbotech Limited (KLA Corporation)
• Original Assignee: Orbotech Limited (KLA Corporation)
• Inventors: Smilansky, Zeev, Klingbell, Eyal, Gilat-Bernshtein, Tally, Duvdevani, Sharon, Mayo, Meir, Rippa, Shmuel
• Primary Examiner(s): Mehta; Bhavesh M.
• Assistant Examiner(s): Seth; Manav
• Application Number:
  US10/706,440
• Publication Number:
  US 20040126005A1
• Time in Patent Office: 1,196 Days
• Field of Search: 382/141, 382144-151, 382/199, 382/209, 382/217, 382/218, 382/242, 382/266, 348125-126, 348129-130
• US Class Current: 382/149
• CPC Class Codes: G06F 18/40 Software arrangements specially adapted for pattern recognition, e.g. user interfaces or toolboxes therefor
• CPC Class Codes: G06T 2207/30141 Printed circuit board [PCB]
• CPC Class Codes: G06T 7/001 using an image reference approach
• CPC Class Codes: G06V 10/469 Contour-based spatial representations, e.g. vector-coding
• CPC Class Codes: G06V 10/752 Contour matching
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding

Abstract

A method for inspecting electrical circuits, and a system for carrying out the method, generating a representation of boundaries of elements in an image of an electrical circuit which is under inspection, and analyzing at least some locations of at least some boundaries in the representation of boundaries of elements to identify defects in the electrical circuit.

Claims

1. A system for inspecting electrical circuits comprising:

a boundary identifier operative to generate a representation of boundaries of elements in an image of an electrical circuit which is under inspection;

an element matching defect identifier operative to receive said representation of boundaries of elements and a reference representation including reference boundaries for said electrical circuit and to compare boundaries in said representation of boundaries to said reference boundaries to identify element matching defects, said element matching defects including at least one of;

elements in said reference representation but missing from said representation of boundaries, excess elements in said representation of boundaries that are missing from said reference representation, and elements in said representation of boundaries defining a different type of element than a corresponding element in said reference representation; and

a boundary defect identifier operative to receive said boundaries of elements in said electrical circuit under inspection and to compare a plurality of coordinates along at least a portion of some boundaries with reference to a corresponding region of acceptable coordinates for said portion of some boundaries to detect boundary defects.

2. A system according to claim 1, and wherein said boundary identifier is operative in hardware.

3. A system according to claim 1, and wherein said boundary defect identifier is operative in software.

4. A system according to claim 2, and wherein said boundary defect identifier is operative in software.

5. A system according to claim 1, and wherein said boundary identifier is operative to compare an actual location of at least one boundary from among said boundaries in said image of an electrical circuit under inspection, to a location of a corresponding boundary in at least one reference representation.

6. A system according to claim 1, wherein said boundaries comprise Contours.

7. A system according to claim 1, and wherein said element matching defect identifier is operative to identify at least some putative defects.

8. A system according to claim 7, and wherein said boundary defect identifier is operative to analyze at least some boundaries that are associated with defects other than putative defects.

9. A system according to claim 1, and wherein said system further includes a region of interest identifier operative to identify a portion of said image of an electrical circuit which is under inspection as being a region of interest.

10. A system according to claim 9, and wherein said boundary defect identifier is operative to analyze, from among at least some boundaries, only those boundaries that are in said region of interest.

11. A system according to claim 8, and wherein said system further includes a region of interest identifier operative to identify a portion of said image of an electrical circuit which is under inspection as being a region of interest, and said boundary defect identifier is operative to analyze at least one characteristic of said at least some boundaries that are in said region of interest.

12. A method for inspecting electrical circuits comprising:

generating a representation of boundaries of elements in an image of an electrical circuit;

detecting element matching defects by comparing said boundaries in said representation of boundaries to reference boundaries in a reference representation of boundaries for said electrical circuit, said element matching defects including at least one of;

elements in said reference representation but missing from said representation of boundaries, excess elements in said representation of boundaries that are missing from said reference representation, and elements in said representation of boundaries defining a different type of element than a corresponding element in said reference representation; and

and comparing a plurality of coordinates along at least a portion of said boundaries in said representation of boundaries of elements with reference to a corresponding region of acceptable coordinates for said portion of said boundaries to detect boundary defects in said electrical circuit.

13. A method according to claim 12, and wherein said generating is performed in hardware.

14. A method according to claim 12, and wherein said comparing is performed in software.

15. A method according to claim 13, and wherein said comparing is performed in software.

16. A method according to claim 12, and further including identifying a portion of said image of an electrical circuit as being a region of interest.

17. A method according to claim 12, wherein said corresponding region of acceptable coordinates comprises an envelope around the at least one boundary in the at least one reference representation.

18. A method of manufacturing an electrical circuit comprising:

acquiring an image of at least a portion of an electrical circuit and inspecting said image for defects in said electrical circuit, said inspecting including;

generating a representation of boundaries of elements in the image;

detecting element matching defects by comparing said boundaries in said representation of boundaries to reference boundaries in a reference representation of boundaries for said electrical circuit, said element matching defects including at least one of;

elements in said reference representation but missing from said representation of boundaries, excess elements in said representation of boundaries that are missing from said reference representation, and elements in said representation of boundaries defining a different type of element than a corresponding element in said reference representation; and

comparing a plurality of coordinates along at least a portion of said boundaries in said representation of boundaries of elements with reference to a corresponding region of acceptable coordinates for said portion of said boundaries to detect boundary defects in said electrical circuit portion.

19. A method according to claim 18, and wherein said generating is performed in hardware.

20. A method according to claim 18, and wherein said comparing is performed in software.

21. A method according to claim 19, and wherein said comparing is performed in software.

22. A method according to claim 18, and further including identifying a portion of said image of an electrical circuit as being a region of interest.