Apparatus and method for selective control of condition code write back

  • US 7,185,180 B2
  • Filed: 05/09/2002
  • Issued: 02/27/2007
  • Est. Priority Date: 04/02/2002
  • Status: Active Grant
First Claim
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1. A microprocessor apparatus, for selectively controlling write back of condition codes, comprising:

  • translation logic, for translating an extended instruction into corresponding micro instructions, wherein said extended instruction comprises;

    an extended prefix, for disabling write back of the condition codes, the condition codes corresponding to a result of a prescribed operation; and

    an extended prefix tag, for indicating said extended prefix, wherein said extended prefix tag is an otherwise architecturally specified opcode within an instruction set for a microprocessor; and

    extended execution logic, coupled to said translation logic, for receiving said corresponding micro instructions, and for generating said result, and for disabling write back of the condition codes.

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