Power and ground buss layout for reduced substrate size

  • US 7,195,341 B2
  • Filed: 09/30/2004
  • Issued: 03/27/2007
  • Est. Priority Date: 09/30/2004
  • Status: Active Grant
First Claim
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1. A semiconductor substrate for a micro-fluid ejection device, the substrate comprising:

  • a plurality of micro-fluid ejection actuators disposed in a columnar array adjacent a fluid supply slot in the semiconductor substrate;

    a plurality of power transistors disposed in a columnar array adjacent the ejection actuators and connected through a first metal conductor layer to the ejection actuators, the columnar array of power transistors occupying a power transistor active area of the substrate;

    a columnar array of logic circuits disposed adjacent the columnar array of power transistors and connected through a polysilicon conductor layer to the power transistors, the columnar array of logic circuits occupying a logic circuit area of the substrate;

    a power conductor for the ejection actuators routed in a second metal conductor layer disposed in overlapping relationship with at least a portion of the power transistor active area of the substrate; and

    a ground conductor for the ejection actuators routed in the second metal conductor layer disposed in overlapping relationship with at least a portion of the logic circuit area of the substrate.

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