Memory management of local variables
First Claim
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1. A processor, comprising:
- a processing core that generates memory addresses to access a main memory and on which a plurality of methods operate, each method using its own set of local variables; and
a data cache subsystem comprising a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a register, wherein local variables are stored in said data memory, and wherein upon completion of a method, the local variables associated with said completed method continue to be marked as valid and not copied back to a main memory even though the lines in which the completed method'"'"'s local variables are stored are marked as valid and dirty.
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Abstract
A processor preferably comprises a processing core that generates memory addresses to access a main memory and on which a plurality of methods operate. Each method uses its own set of local variables. The processor also includes a cache subsystem comprising a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a register, wherein local variables are stored in said data memory.
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Citations
15 Claims
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1. A processor, comprising:
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a processing core that generates memory addresses to access a main memory and on which a plurality of methods operate, each method using its own set of local variables; and a data cache subsystem comprising a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a register, wherein local variables are stored in said data memory, and wherein upon completion of a method, the local variables associated with said completed method continue to be marked as valid and not copied back to a main memory even though the lines in which the completed method'"'"'s local variables are stored are marked as valid and dirty. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A cache subsystem, comprising:
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a multi-way set associative cache; a data memory that holds a contiguous block of memory defined by an address stored in a register, wherein local variables are stored in said data memory; and wnerein the data memory includes a plurality of lines and a valid bit and a dirty bit associated with each line, and wherein upon completion of a method, the local variables associated with said completed method continue to be marked as valid and not copied back to a main memory even though the lines in which the completed method'"'"'s local variables are stored are marked as valid and dirty. - View Dependent Claims (9)
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10. A cache subsystem, comprising:
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a multi-way set associative cache; a data memory that holds a contiguous block of memory defined by an address stored in a register, wherein local variables are stored in said data memory; and wherein the data memory includes a plurality of lines, each line being marked as either valid or invalid, and when a line is marked as invalid and data memory hit/miss occurs, a targeted line is marked as valid causing a line fetch from external memory to occur, wherein a hit/miss indicates that a targeted address hits in the data memory but targeted data is not stored in the data memory. - View Dependent Claims (11, 12, 13)
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14. A method, comprising the steps of:
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programming a register to define a contiguous block of memory in a cache subsystem; storing local variables associated with executing methods in the contiguous block of memory; and marking lines in the block as valid; and upon completing a method, continuing to mark the lines storing the completed method'"'"'s local variables as valid and not copying the local variables associated with the completed method to a main memory.
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15. A method, comprising the step of:
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programming a register to define a contiguous block of memory in a cache subsystem; storing local variables associated with executing methods in the contiguous block of memory; and configuring a global valid bit to indicate whether the local variables are collectively valid and configuring a valid bit for each of a plurality of entries in the block to indicate whether each entry contains valid data.
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Specification