CMOS image sensor and method for manufacturing the same
First Claim
1. A CMOS image sensor comprising:
- a) a semiconductor substrate having an isolation region, an edge portion adjacent to the isolation region and an active region for a unit pixel, wherein the edge portion has width of 50 μ
m or more;
b) at least one transistor formed on said semiconductor substrate in said unit pixel;
c) a diffusion region for a photodiode, wherein the edge portion is between said diffusion region and said isolation region; and
d) an electrically isolated passivation layer on both the edge portion and a portion of the isolation region, but not on the diffusion region.
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Abstract
A CMOS image sensor and a manufacturing method thereof are disclosed. The gates of the transistors are formed in an active region of a unit pixel, and at the same time, a passivation layer is formed on an edge portion of the active region of a photodiode to have the same laminate structure as the gates of the transistors. Impurities for a diffusion region of the photodiode are ion-implanted into the active region for the photodiode, after the laminate structure is formed. The passivation layer prevents the edge portion from being damaged by ion implantation at the boundary or interface between the photodiode diffusion region and an isolation layer, which reduces dark current and/or leakage current of the CMOS image sensor.
38 Citations
19 Claims
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1. A CMOS image sensor comprising:
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a) a semiconductor substrate having an isolation region, an edge portion adjacent to the isolation region and an active region for a unit pixel, wherein the edge portion has width of 50 μ
m or more;b) at least one transistor formed on said semiconductor substrate in said unit pixel; c) a diffusion region for a photodiode, wherein the edge portion is between said diffusion region and said isolation region; and d) an electrically isolated passivation layer on both the edge portion and a portion of the isolation region, but not on the diffusion region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A CMOS image sensor comprising:
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a) a semiconductor substrate having a photodiode region having at least four sides, an isolation region along first, second and third sides of the photodiode region, and edge portions between each of the first, second and third sides of the photodiode region and the corresponding isolation region, wherein the edge portions have a width of 50 μ
m or more;b) at least one transistor formed on said semiconductor substrate adjacent to a fourth side of the photodiode region; and c) a passivation layer on both the edge portion and a portion of the isolation region along the first, second and third sides of the photodiode, but not on the photodiode region. - View Dependent Claims (16, 17, 18)
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19. A CMOS image sensor comprising:
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a) a semiconductor substrate having a photodiode region having at least four sides, an isolation region along first, second and third sides of the photodiode region, and edge portions between each of the first, second and third sides of the photodiode region and the corresponding isolation region; b) at least one transistor formed on said semiconductor substrate adjacent to a fourth side of the photodiode region; and a) an electrically isolated passivation layer on both the edge portion and a portion of the isolation region along the first, second and third sides of the photodiode, but not on the photodiode region.
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Specification