Method and apparatus for fault condition protection of a switched mode power supply

• US 7,218,495 B2
• Filed: 05/19/2004
• Issued: 05/15/2007
• Est. Priority Date: 03/14/2001
• Status: Expired due to Fees

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Balakrishnan, Balu
• Primary Examiner(s): Jackson; Stephen W
• Assistant Examiner(s): Patel; Dharti H.
• Application Number:
  US10/850,487
• Publication Number:
  US 20040212942A1
• Time in Patent Office: 1,091 Days
• Field of Search: 361/90, 361/91.1, 361/92, 361/93.4
• US Class Current: 361/93.4
• CPC Class Codes: H02H 3/06 with automatic reconnection
• CPC Class Codes: H02H 3/087 for dc applications
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters

Abstract

Methods and apparatuses for fault condition protection of a switched mode power supply. In one aspect of the invention, a power supply circuit having an auto-restart function to turn the power supply on and off repeatedly under fault conditions is included. In one embodiment, one or more off-times following detection of a fault condition is smaller than subsequent off-times.

Claims

1. A method, comprising:

regulating a delivery of power from a power supply input to a power supply output;

detecting a fault condition in the power supply; and

repeatedly enabling and disabling the power supply during the fault condition,

wherein a duration of one or more disable periods following the detection of the fault condition in the power supply is smaller than a duration of subsequent disable periods.

2. The method of claim 1 wherein detecting the fault condition in the power supply includes detecting an open loop condition in the power supply.

3. The method of claim 2 wherein detecting the open loop condition in the power supply includes detecting at least one of a power supply output short circuit condition and a power supply output overload condition in the power supply.

4. The method of claim 3 wherein the power supply output overload condition is caused by a power supply input under-voltage condition in the power supply.

5. The method of claim 1 wherein regulating the delivery of power from the power supply input to the power supply output includes switching a power switch in response to a switching signal.

6. The method of claim 1 wherein only a duration of a first disable period following the detection of the fault condition in the power supply is smaller than the duration of subsequent disable periods.

7. The power supply circuit of claim 1 wherein the detection of the fault condition in the power supply occurs after the power supply has been in regulation.