Smart lock-in circuit for phase-locked loops

DC
  • US 7,224,233 B2
  • Filed: 01/15/2005
  • Issued: 05/29/2007
  • Est. Priority Date: 01/15/2005
  • Status: Expired due to Fees
First Claim
Patent Images

1. A smart lock-in circuit for enabling any phase-locked loop including at least a filter to become locked according to schedule, comprising:

  • a feedback line connected to an output and input of the smart lock-in circuit and also coupled to an output of a filter;

    a sensor for sensing a voltage at the filter output, comparing with a midpoint voltage decided by device aspect ratios of the sensor, and providing its response;

    two stacked PMOS transistors connected between power supply and the output; and

    two stacked NMOS transistors connected between the output and ground.

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