Apparatus, system, and method for oscillator network with multiple parallel oscillator circuits

• US 7,236,059 B2
• Filed: 06/29/2005
• Issued: 06/26/2007
• Est. Priority Date: 06/29/2005
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Intel Corporation
• Inventors: Stevenson, Paul E., Lahey, William, Tourville, Jon
• Primary Examiner(s): MIS, DAVID C
• Application Number:
  US11/172,133
• Publication Number:
  US 20070001774A1
• Time in Patent Office: 727 Days
• Field of Search: 331/2, 331/16, 331/46, 331/55, 331/116.R, 331/116.FE, 331/158, 375/376, 455/75, 455/76, 455/575
• US Class Current: 331/46
• CPC Class Codes: G06F 1/06 Clock generators producing several clock signals G06F1/08 - G06F1/14 take precedence
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: H03B 2200/0012 Pierce oscillator
• CPC Class Codes: H03B 5/36 active element in amplifier being semiconductor device H03B5/323, H03B5/326 , H03B5/38 take precedence
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system, apparatus, and method to connect an oscillator network to multiple parallel oscillator circuits. The apparatus may include multiple modules located within a platform, where each of the multiple modules includes an internal oscillator circuit and the platform includes an input port; and an oscillator network located external to the platform. The oscillator network is coupled to each of said internal oscillator circuits through the input port. Other embodiments are described and claimed.

Claims

1. An apparatus, comprising:

multiple modules comprising an internal oscillator circuit located on a substrate, wherein at least one of said multiple modules comprises an input port; and

an oscillator network located external to said multiple modules, said oscillator network coupled to at least one of said internal oscillator circuits through said input port, said oscillator network to provide a reference frequency to said oscillator circuit;

wherein said internal oscillator circuit is to generate a reference frequency signal; and

wherein at least one of said multiple modules comprises an automatic amplitude control circuit (AAC) coupled to said oscillator network, said AAC comprising a current source.

2. The apparatus of claim 1, wherein said multiple modules comprise at least an application processor and at least a communication processor.

3. The apparatus of claim 1, wherein each of said internal oscillator circuits comprises first and second input pins, and wherein each of said first input pins are connected to each of said second input pins.

4. The apparatus of claim 1, wherein said substrate comprises a platform for any one of a wireless, mobile, and handheld device.

5. The apparatus of claim 1, wherein said oscillator network comprises at least a crystal.

6. The apparatus of claim 1, wherein said oscillator network comprises at least a resonator.

7. The apparatus of claim 1, wherein at least one of said multiple modules comprises a crystal integrated therewith.

8. The apparatus of claim 1, wherein at least one of said multiple modules comprises at least a capacitor integrated therewith.

9. The apparatus of claim 1, wherein said AAC is to detect the amplitude of said reference frequency signal and to adjust a drive current generated by said current source based on the detected amplitude of said reference frequency signal.

10. The apparatus of claim 9, wherein said AAC is to adjust said drive current to adjust the amplitude of said reference frequency signal.

11. The apparatus of claim 1, wherein said AAC is to detect the slew rate of said reference frequency signal and to adjust a drive current generated by said current source based on the detected slew rate of said reference frequency signal.

12. The apparatus of claim 1, wherein two or more of said multiple modules are to synchronize a clock signal based on said reference frequency signal.

13. A system, comprising:

an antenna;

a substrate coupled to said antenna, said substrate comprising an input port;

multiple modules located within said substrate, wherein each of said multiple modules comprises an internal oscillator circuit; and

an oscillator network coupled to each of said internal oscillator circuits through said input port, said oscillator network to provide a reference frequency to said oscillator circuit;

wherein said internal oscillator circuit is to generate a reference frequency signal; and

wherein each of said internal oscillator circuits comprises first and second input pins, and wherein each of said first input pins are connected to each of said second input pins, said connections are located internal to said substrate.

14. The system of claim 13, wherein said multiple modules comprise at least an application processor and at least a communication processor.

15. The system of claim 13, wherein said substrate comprises a platform for any one of a wireless, mobile, and handheld device.

16. The system of claim 13, wherein said oscillator network comprises at least a crystal to couple said oscillator network to said port.

17. The system of claim 13, wherein said oscillator network comprises at least a resonator.

18. The system of claim 13, wherein at least one of said multiple modules comprises a crystal integrated therewith.

19. The system of claim 13, wherein at least one of said multiple modules comprises at least a capacitor integrated therewith.

20. A system, comprising:

an antenna;

a substrate coupled to said antenna, said substrate comprising an input port;

multiple modules located within said substrate, wherein each of said multiple modules comprises an internal oscillator circuit; and

an oscillator network coupled to each of said internal oscillator circuits through said input port, said oscillator network to provide a reference frequency to said oscillator circuit;

wherein said internal oscillator circuit is to generate a reference frequency signal; and

wherein at least one of said multiple modules comprises an automatic amplitude control circuit (AAC) coupled to said oscillator network, said AAC comprising a current source.

21. The system of claim 20, wherein said AAC is to detect the amplitude of said reference frequency signal and to adjust a drive current generated by said current source based on the detected amplitude of said reference frequency signal.

22. The system of claim 21, wherein said AAC is to adjust said drive current to adjust the amplitude of said reference frequency signal.

23. The system of claim 20, wherein said AAC is to detect the slew rate of said reference frequency signal and to adjust a drive current generated by said current source based on the detected slew rate of said reference frequency signal.

24. The system of claim 20, wherein two or more of said multiple modules are to synchronize a clock signal based on said reference frequency signal.

25. A method, comprising:

generating a frequency reference external to multiple oscillator circuits located on a substrate;

providing said external frequency reference to said multiple oscillator circuits located within multiple modules on said substrate;

generating a clock signal by each of said multiple oscillator circuits based on said external frequency reference;

detecting an amplitude of said external frequency reference by said multiple oscillator circuits; and

scaling back a drive current associated with said multiple oscillator circuits based on said detected amplitude.

26. The method of claim 25, wherein providing said external frequency reference, comprises providing said external frequency reference through an input port.

27. The method of claim 25, further comprising:

scaling back said drive current to adjust said amplitude.

28. The method of claim 25, further comprising:

synchronizing said clock signals to said external frequency reference.