Adjustable lock-in circuit for phase-locked loops

DC
  • US 7,242,254 B2
  • Filed: 04/08/2005
  • Issued: 07/10/2007
  • Est. Priority Date: 04/08/2005
  • Status: Expired due to Fees
First Claim
Patent Images

1. An adjustable lock-in circuit for enabling any phase-locked loop to become locked according to a targeted lock-in time, comprising:

  • a feedback line connected with the output of the adjustable lock-in circuit and also coupled to the output of a filter;

    a sensor for comparing a feedback voltage with a reference voltage and providing its output;

    two stacked PMOS transistors connected between power supply and the output; and

    two stacked NMOS transistors connected between the output and ground.

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